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Message-ID: <769a67cb-1b32-fd4f-b37e-e3ec4dab5eb9@rock-chips.com>
Date: Fri, 25 Aug 2023 17:17:34 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Sharp.Xia@...iatek.com
Cc: shawn.lin@...k-chips.com, angelogioacchino.delregno@...labora.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-mmc@...r.kernel.org,
matthias.bgg@...il.com, ulf.hansson@...aro.org,
wsd_upstream@...iatek.com
Subject: Re: [PATCH 1/1] mmc: Set optimal I/O size when mmc_setip_queue
On 2023/8/25 16:39, Sharp.Xia@...iatek.com wrote:
> On Fri, 2023-08-25 at 16:11 +0800, Shawn Lin wrote:
>>
>> Hi Sharp,
...
>>> 1024
>>>
> Hi Shawn,
>
> What is your readahead value before and after applying this patch?
>
The original readahead is 128, and after applying the patch is 1024
cat /d/mmc0/ios
clock: 200000000 Hz
actual clock: 200000000 Hz
vdd: 18 (3.0 ~ 3.1 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 3 (8 bits)
timing spec: 10 (mmc HS400 enhanced strobe)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
The driver I used is sdhci-of-dwcmshc.c with a KLMBG2JETDB041 eMMC chip.
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