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Message-ID: <b46d8e10-5f25-4350-b5b9-77bf5885780f@linaro.org>
Date:   Fri, 25 Aug 2023 13:50:00 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Trilok Soni <quic_tsoni@...cinc.com>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>
Cc:     Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH RFC DNM] perf: Add support for Qualcomm Last-Level Cache
 Controller PMU

On 24.08.2023 23:31, Trilok Soni wrote:
> On 8/9/2023 1:09 PM, Konrad Dybcio wrote:
>> Add support for the Qualcomm LLCC (Last-Level Cache Controller) PMU,
>> which provides a single event, expressing cache read misses.
>>
>> Based on the vendor driver found in the msm-5.10 downstream kernel.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
>> ---
>> Hi, I've been trying to get this driver going upstream by cleaning it
>> up and adding the necessary perf boilerplate (the original Qualcomm one
>> only pokes at the PMU from within the kernel itself) to use the
>> userspace tool.
>>
>> I can not however get it to cooperate.. in this iteration I get a PMU
>> event registered (though with only a "raw" name - no "x OR y" like with
>> other PMUs on the system) as:
>>
>> llcc_pmu/read_miss/                                [Kernel PMU event]
>>
>> but the .read callback is never called when I run:
>>
>> sudo perf stat -C 0 -a -e llcc_pmu/read_miss/ stress-ng -C 8 -c 8 -m 10
>>
>> which always returns 0
>>
>> if I add --always-kernel I get:
>> <not supported>      llcc_pmu/read_miss/
> 
> Which SOC you are trying this on?
8250

Konrad

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