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Message-ID: <1693250307-8910-7-git-send-email-quic_srichara@quicinc.com>
Date: Tue, 29 Aug 2023 00:48:26 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: <agross@...nel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <srinivas.kandagatla@...aro.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <thara.gopinath@...il.com>,
<rafael@...nel.org>, <daniel.lezcano@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<quic_srichara@...cinc.com>
Subject: [PATCH 6/7] arm64: dts: qcom: ipq5018: Add tsens node
IPQ5018 has tsens V1.0 IP with 4 sensors.
There is no RPM, so tsens has to manually enabled.
Adding the tsens and nvmem node.
Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index 9f13d2dcdfd5..277b3cfc7f72 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -93,6 +93,29 @@ soc: soc@0 {
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
+ qfprom_nvmem: qfprom_nvmem@...00 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
+ reg = <0xa0000 0x1000>;
+
+ tsens_calib: calib@248 {
+ reg = <0x248 0x10>;
+ };
+ };
+
+ tsens: thermal-sensor@...000 {
+ compatible = "qcom,ipq5018-tsens", "qcom,tsens-v1";
+ reg = <0x4a9000 0x1000>, /* TM */
+ <0x4a8000 0x1000>; /* SORT */
+ nvmem-cells = <&tsens_calib>;
+ nvmem-cell-names = "calib";
+ interrupts = <GIC_SPI 184 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "uplow";
+ #qcom,sensors = <5>;
+ #thermal-sensor-cells = <1>;
+ };
+
tlmm: pinctrl@...0000 {
compatible = "qcom,ipq5018-tlmm";
reg = <0x01000000 0x300000>;
--
2.34.1
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