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Message-ID: <87r0nn8ots.ffs@tglx>
Date: Mon, 28 Aug 2023 12:05:03 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: K Prateek Nayak <kprateek.nayak@....com>,
LKML <linux-kernel@...r.kernel.org>
Cc: x86@...nel.org, Tom Lendacky <thomas.lendacky@....com>,
Andrew Cooper <andrew.cooper3@...rix.com>,
Arjan van de Ven <arjan@...ux.intel.com>,
Huang Rui <ray.huang@....com>, Juergen Gross <jgross@...e.com>,
Dimitri Sivanich <dimitri.sivanich@....com>,
Michael Kelley <mikelley@...rosoft.com>,
Wei Liu <wei.liu@...nel.org>, Pu Wen <puwen@...on.cn>,
Qiuxu Zhuo <qiuxu.zhuo@...el.com>,
Sohil Mehta <sohil.mehta@...el.com>,
Gautham Shenoy <gautham.shenoy@....com>
Subject: Re: [patch V4 24/41] x86/cpu: Provide cpu_init/parse_topology()
Prateek!
On Mon, Aug 28 2023 at 11:37, K. Prateek Nayak wrote:
> On 8/14/2023 2:24 PM, Thomas Gleixner wrote:
>
> Since these enums come from the description of level type of CPUID leaf
> 0x1f, can we have a short description clarifying what each signify. This
> will also help clarify the mappings for AMD's extended CPUID leaf
> 0x80000026 (specifically for CCX and CCD level types). I had following
> in my mind:
Makes sense.
> TOPO_MODULE_DOMAIN,
> + /*
> + * If exists, represents a group of tiles within
> + * an instance of the next domain
> + *
> + * On Intel: This level contains a group of Tile
> + * type as described by CPUID leaf 0x1f
> + *
> + * On AMD: This is the group of "Complex" type
> + * instances as described by CPUID leaf
> + * 0x8000_0026
> + */
> TOPO_TILE_DOMAIN,
> + /*
> + * If exists, represents a group of dies within an
> + * instance of the next domain
> + *
> + * On Intel: This level contains group of Die
> + * type as described by CPUID leaf 0x1f
> + *
> + * On AMD: This is the group of "CCD (Die)"
> + * type instances as described by CPUID leaf
> + * 0x8000_0026
> + */
> TOPO_DIE_DOMAIN,
> + /*
> + * If exists, represents a group of packages
> + * within the root domain
> + */
> TOPO_PKG_DOMAIN,
> + /* Topmost domain with a singular instance */
> TOPO_ROOT_DOMAIN,
> TOPO_MAX_DOMAIN,
> };
Now this begs the obvious question what the actual meaning of these
domains is and what's their relevance for the kernel.
It's probably undisputed what SMT/CORE mean and what their relevance is.
The PKG/DIE domains are pretty clear too.
Now we have:
MODULE (Intel only)
TILE Intel, AMD names it "Complex"
So here are the questions:
- is TILE to "Complex" the proper mapping?
- which information is conveyed by MODULE and TILE?
- Are these really different between AMD and Intel or is this some
naming convention issue which needs to be resolved?
Thanks,
tglx
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