[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1693234725-3615719-4-git-send-email-srinivas.goud@amd.com>
Date: Mon, 28 Aug 2023 20:28:45 +0530
From: Srinivas Goud <srinivas.goud@....com>
To: <wg@...ndegger.com>, <mkl@...gutronix.de>, <davem@...emloft.net>,
<edumazet@...gle.com>, <kuba@...nel.org>, <pabeni@...hat.com>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<conor+dt@...nel.org>, <p.zabel@...gutronix.de>
CC: <git@....com>, <michal.simek@....com>, <linux-can@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
<devicetree@...r.kernel.org>, <appana.durga.rao@...inx.com>,
<naga.sureshkumar.relli@...inx.com>,
"Srinivas Goud" <srinivas.goud@....com>
Subject: [PATCH v3 3/3] can: xilinx_can: Add ethtool stats interface for ECC errors
Add ethtool stats interface for reading FIFO 1bit/2bit
ECC errors information.
Signed-off-by: Srinivas Goud <srinivas.goud@....com>
---
Changes in v3:
None
Changes in v2:
Add ethtool stats interface
drivers/net/can/xilinx_can.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c
index 798b32b..50e0c9d 100644
--- a/drivers/net/can/xilinx_can.c
+++ b/drivers/net/can/xilinx_can.c
@@ -219,6 +219,7 @@ struct xcan_devtype_data {
* @transceiver: Optional pointer to associated CAN transceiver
* @rstc: Pointer to reset control
* @ecc_enable: ECC enable flag
+ * @stats_lock: Lock for synchronizing hardware stats
* @ecc_2bit_rxfifo_cnt: RXFIFO 2bit ECC count
* @ecc_1bit_rxfifo_cnt: RXFIFO 1bit ECC count
* @ecc_2bit_txolfifo_cnt: TXOLFIFO 2bit ECC count
@@ -245,6 +246,7 @@ struct xcan_priv {
struct phy *transceiver;
struct reset_control *rstc;
bool ecc_enable;
+ spinlock_t stats_lock; /* Lock for synchronizing hardware stats */
u64 ecc_2bit_rxfifo_cnt;
u64 ecc_1bit_rxfifo_cnt;
u64 ecc_2bit_txolfifo_cnt;
@@ -1164,6 +1166,9 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
if (priv->ecc_enable) {
u32 reg_ecc;
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->stats_lock, flags);
reg_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET);
if (isr & XCAN_IXR_E2BERX_MASK) {
@@ -1212,6 +1217,8 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr)
*/
priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK |
XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK);
+
+ spin_unlock_irqrestore(&priv->stats_lock, flags);
}
if (cf.can_id) {
@@ -1639,6 +1646,23 @@ static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv)
return 0;
}
+static void ethtool_get_ethtool_stats(struct net_device *ndev,
+ struct ethtool_stats *stats, u64 *data)
+{
+ struct xcan_priv *priv = netdev_priv(ndev);
+ unsigned long flags;
+ int i = 0;
+
+ spin_lock_irqsave(&priv->stats_lock, flags);
+ data[i++] = priv->ecc_2bit_rxfifo_cnt;
+ data[i++] = priv->ecc_1bit_rxfifo_cnt;
+ data[i++] = priv->ecc_2bit_txolfifo_cnt;
+ data[i++] = priv->ecc_1bit_txolfifo_cnt;
+ data[i++] = priv->ecc_2bit_txtlfifo_cnt;
+ data[i++] = priv->ecc_1bit_txtlfifo_cnt;
+ spin_unlock_irqrestore(&priv->stats_lock, flags);
+}
+
static const struct net_device_ops xcan_netdev_ops = {
.ndo_open = xcan_open,
.ndo_stop = xcan_close,
@@ -1648,6 +1672,7 @@ static const struct net_device_ops xcan_netdev_ops = {
static const struct ethtool_ops xcan_ethtool_ops = {
.get_ts_info = ethtool_op_get_ts_info,
+ .get_ethtool_stats = ethtool_get_ethtool_stats,
};
/**
--
2.1.1
Powered by blists - more mailing lists