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Message-ID: <20230829171647.187787-22-knaerzche@gmail.com>
Date: Tue, 29 Aug 2023 19:16:37 +0200
From: Alex Bee <knaerzche@...il.com>
To: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>, Lee Jones <lee@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>
Cc: Elaine Zhang <zhangqing@...k-chips.com>,
Johan Jonker <jbx6244@...il.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, alsa-devel@...a-project.org,
linux-clk@...r.kernel.org, linux-phy@...ts.infradead.org,
Alex Bee <knaerzche@...il.com>
Subject: [PATCH 21/31] ARM: dts: rockchip: add power controller for RK312x
Add the power controller node and the correspondending qos nodes for
RK312x.
Signed-off-by: Alex Bee <knaerzche@...il.com>
---
arch/arm/boot/dts/rockchip/rk312x.dtsi | 82 ++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk312x.dtsi b/arch/arm/boot/dts/rockchip/rk312x.dtsi
index 93560c4cd16a..617306a9edf7 100644
--- a/arch/arm/boot/dts/rockchip/rk312x.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk312x.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3128-power.h>
/ {
compatible = "rockchip,rk3128";
@@ -133,6 +134,87 @@ smp-sram@0 {
pmu: syscon@...a0000 {
compatible = "rockchip,rk3128-pmu", "syscon", "simple-mfd";
reg = <0x100a0000 0x1000>;
+
+ power: power-controller {
+ compatible = "rockchip,rk3128-power-controller";
+ #power-domain-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ power-domain@...128_PD_VIO {
+ reg = <RK3128_PD_VIO>;
+ clocks = <&cru ACLK_RGA>,
+ <&cru ACLK_LCDC0>,
+ <&cru ACLK_IEP>,
+ <&cru ACLK_CIF>,
+ <&cru ACLK_VIO0>,
+ <&cru ACLK_VIO1>,
+ <&cru DCLK_VOP>,
+ <&cru DCLK_EBC>,
+ <&cru HCLK_RGA>,
+ <&cru HCLK_VIO>,
+ <&cru HCLK_EBC>,
+ <&cru HCLK_LCDC0>,
+ <&cru HCLK_IEP>,
+ <&cru HCLK_CIF>,
+ <&cru HCLK_VIO_H2P>,
+ <&cru PCLK_MIPI>,
+ <&cru SCLK_VOP>;
+ pm_qos = <&qos_rga>,
+ <&qos_iep>,
+ <&qos_lcdc>,
+ <&qos_vip>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@...128_PD_VIDEO {
+ reg = <RK3128_PD_VIDEO>;
+ clocks = <&cru ACLK_VEPU>,
+ <&cru ACLK_VDPU>,
+ <&cru HCLK_VEPU>,
+ <&cru HCLK_VDPU>,
+ <&cru SCLK_HEVC_CORE>;
+ pm_qos = <&qos_vpu>;
+ #power-domain-cells = <0>;
+ };
+
+ power-domain@...128_PD_GPU {
+ reg = <RK3128_PD_GPU>;
+ clocks = <&cru ACLK_GPU>;
+ pm_qos = <&qos_gpu>;
+ #power-domain-cells = <0>;
+ };
+ };
+ };
+
+ qos_gpu: qos@...2d000 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012d000 0x20>;
+ };
+
+ qos_vpu: qos@...2e000 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012e000 0x20>;
+ };
+
+ qos_rga: qos@...2f000 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012f000 0x20>;
+ };
+
+ qos_iep: qos@...2f100 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012f100 0x20>;
+ };
+
+ qos_lcdc: qos@...2f180 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012f180 0x20>;
+ };
+
+ qos_vip: qos@...2f200 {
+ compatible = "rockchip,rk3128-qos", "syscon";
+ reg = <0x1012f200 0x20>;
};
gic: interrupt-controller@...39000 {
--
2.42.0
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