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Message-ID: <da9f57cc-37b9-ff1b-8176-b27c90290395@quicinc.com>
Date:   Tue, 29 Aug 2023 14:52:25 +0530
From:   Ajit Pandey <quic_ajipan@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Taniya Das <quic_tdas@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>
CC:     <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/4] clk: qcom: Add GCC driver support for SM4450



On 8/25/2023 5:19 PM, Konrad Dybcio wrote:
> On 24.08.2023 19:34, Ajit Pandey wrote:
>> Add Global Clock Controller (GCC) support for SM4450 platform.
>>
>> Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>
>> ---
> [...]
> 
>> +
>> +	/* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
>> +	regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14));
> qcom_branch_set_force_mem_core() and remove the comment
> 
> Konrad
Sure, will update this in next series

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