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Message-ID: <afac7b40-1bdc-c546-1ba1-2cfba74e6adc@starfivetech.com>
Date: Tue, 29 Aug 2023 09:58:21 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Conor Dooley <conor.dooley@...rochip.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
CC: Conor Dooley <conor+dt@...nel.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [-next v1] riscv: dts: starfive: visionfive 2: Enable usb0 and
fix tdm pins sort order
On Mon, 28 Aug 2023 13:05:06 +0100, Conor Dooley wrote:
> On Mon, Aug 28, 2023 at 01:54:53PM +0200, Krzysztof Kozlowski wrote:
>> On 28/08/2023 13:52, Hal Feng wrote:
>> > usb0 was disabled by mistake when merging, so enable it.
>> > tdm_pins node should be sorted alphabetically.
>> >
>> > Fixes: e7c304c0346d ("riscv: dts: starfive: jh7110: add the node and pins configuration for tdm")
>> > Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
>> > ---
>> > .../jh7110-starfive-visionfive-2.dtsi | 49 ++++++++++---------
>> > 1 file changed, 25 insertions(+), 24 deletions(-)
>> >
>> > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > index d79f94432b27..382dfb5e64e4 100644
>> > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> > @@ -440,30 +440,6 @@ GPOEN_ENABLE,
>> > };
>> > };
>> >
>> > - uart0_pins: uart0-0 {
>> > - tx-pins {
>> > - pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
>> > - GPOEN_ENABLE,
>> > - GPI_NONE)>;
>> > - bias-disable;
>> > - drive-strength = <12>;
>> > - input-disable;
>> > - input-schmitt-disable;
>> > - slew-rate = <0>;
>> > - };
>> > -
>> > - rx-pins {
>> > - pinmux = <GPIOMUX(6, GPOUT_LOW,
>> > - GPOEN_DISABLE,
>> > - GPI_SYS_UART0_RX)>;
>> > - bias-disable; /* external pull-up */
>> > - drive-strength = <2>;
>> > - input-enable;
>> > - input-schmitt-enable;
>> > - slew-rate = <0>;
>> > - };
>> > - };
>> > -
>> > tdm_pins: tdm-0 {
>> > tx-pins {
>> > pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
>> > @@ -497,6 +473,30 @@ GPOEN_DISABLE,
>> > input-enable;
>> > };
>> > };
>> > +
>> > + uart0_pins: uart0-0 {
>> > + tx-pins {
>> > + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
>> > + GPOEN_ENABLE,
>> > + GPI_NONE)>;
>> > + bias-disable;
>> > + drive-strength = <12>;
>> > + input-disable;
>> > + input-schmitt-disable;
>> > + slew-rate = <0>;
>> > + };
>> > +
>> > + rx-pins {
>> > + pinmux = <GPIOMUX(6, GPOUT_LOW,
>> > + GPOEN_DISABLE,
>> > + GPI_SYS_UART0_RX)>;
>> > + bias-disable; /* external pull-up */
>> > + drive-strength = <2>;
>> > + input-enable;
>> > + input-schmitt-enable;
>> > + slew-rate = <0>;
>> > + };
>>
>>
>> What is fixed in this hunk? Order of nodes is just a style, not a bug
>> needing backports.
>
> Please split this in two parts, with one for my screwed up conflict
> resolution & one for the node ordering.
OK, I will split this into two patches. Thanks.
Best regards,
Hal
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