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Message-ID: <f7bd1ae7-fc38-0f29-546b-9ea4a323f42f@quicinc.com>
Date: Mon, 28 Aug 2023 19:05:35 -0700
From: Wesley Cheng <quic_wcheng@...cinc.com>
To: Rob Herring <robh@...nel.org>
CC: <srinivas.kandagatla@...aro.org>, <mathias.nyman@...el.com>,
<perex@...ex.cz>, <broonie@...nel.org>, <lgirdwood@...il.com>,
<krzysztof.kozlowski+dt@...aro.org>, <agross@...nel.org>,
<Thinh.Nguyen@...opsys.com>, <bgoswami@...cinc.com>,
<andersson@...nel.org>, <gregkh@...uxfoundation.org>,
<tiwai@...e.com>, <linux-kernel@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <alsa-devel@...a-project.org>,
<devicetree@...r.kernel.org>, <linux-usb@...r.kernel.org>,
<quic_jackp@...cinc.com>, <quic_plai@...cinc.com>
Subject: Re: [PATCH v3 11/28] dt-bindings: usb: dwc3: Add
snps,num-hc-interrupters definition
Hi Rob,
On 3/11/2023 5:40 AM, Rob Herring wrote:
> On Wed, Mar 08, 2023 at 03:57:34PM -0800, Wesley Cheng wrote:
>> Add a new definition for specifying how many XHCI secondary interrupters
>> can be allocated. XHCI in general can potentially support up to 1024
>> interrupters, which some uses may want to limit depending on how many
>> users utilize the interrupters.
>>
>> Signed-off-by: Wesley Cheng <quic_wcheng@...cinc.com>
>> ---
>> .../devicetree/bindings/usb/snps,dwc3.yaml | 13 +++++++++++++
>> 1 file changed, 13 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>> index be36956af53b..4e2417191f93 100644
>> --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>> +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
>> @@ -359,6 +359,19 @@ properties:
>> items:
>> enum: [1, 4, 8, 16, 32, 64, 128, 256]
>>
>> + snps,num-hc-interrupters:
>> + description:
>> + Defines the maximum number of XHCI host controller interrupters that can
>> + be supported. The XHCI host controller has support to allocate multiple
>> + event rings, which can be assigned to different clients/users. The DWC3
>> + controller has a maximum of 8 interrupters. If this is not defined then
>> + the value will be defaulted to 1. This parameter is used only when
>> + operating in host mode.
>
> Is this an XHCI or DWC3 feature? The former should be added to the XHCI
> binding.
>
Sorry for the late response...message got routed to a folder I don't
frequently check...
This is a XHCI feature, but the DWC3 design is built in a way that DWC3
host initializes the XHCI device and populates the properties associated
to XHCI dev.
Will update the XHCI yaml as well for non-DWC3 based SoCs.
Thanks
Wesley Cheng
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