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Message-ID: <20230829135818.2219438-9-quic_ipkumar@quicinc.com>
Date: Tue, 29 Aug 2023 19:28:17 +0530
From: Praveenkumar I <quic_ipkumar@...cinc.com>
To: <robert.marko@...tura.hr>, <luka.perkov@...tura.hr>,
<quic_ipkumar@...cinc.com>, <agross@...nel.org>,
<andersson@...nel.org>, <konrad.dybcio@...aro.org>,
<vkoul@...nel.org>, <kishon@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<gregkh@...uxfoundation.org>, <catalin.marinas@....com>,
<will@...nel.org>, <p.zabel@...gutronix.de>, <arnd@...db.de>,
<geert+renesas@...der.be>, <nfraprado@...labora.com>,
<rafal@...ecki.pl>, <peng.fan@....com>, <quic_wcheng@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-usb@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
CC: <quic_varada@...cinc.com>
Subject: [PATCH 8/9] phy: qcom: uniphy: Add ipq5332 USB UNIPHY support
This patch adds ipq5332 USB SS UNIPHY support.
Signed-off-by: Praveenkumar I <quic_ipkumar@...cinc.com>
---
This patch depends on the below series which adds support for USB2 in
IPQ5332
https://lore.kernel.org/all/cover.1692699472.git.quic_varada@quicinc.com/
drivers/phy/qualcomm/phy-qcom-uniphy.c | 37 ++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy.c b/drivers/phy/qualcomm/phy-qcom-uniphy.c
index eb71588f5417..91487e68bb6e 100644
--- a/drivers/phy/qualcomm/phy-qcom-uniphy.c
+++ b/drivers/phy/qualcomm/phy-qcom-uniphy.c
@@ -26,6 +26,10 @@
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
+#define PCIE_USB_COMBO_PHY_CFG_MISC1 0x214
+#define PCIE_USB_COMBO_PHY_CFG_RX_AFE_2 0x7C4
+#define PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2 0x7E8
+
struct uniphy_init_tbl {
unsigned int offset;
unsigned int val;
@@ -37,6 +41,12 @@ struct uniphy_init_tbl {
.val = v, \
}
+static const struct uniphy_init_tbl ipq5332_usb_ssphy_init_tbl[] = {
+ UNIPHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_RX_AFE_2, 0x1076),
+ UNIPHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2, 0x3142),
+ UNIPHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_MISC1, 0x3),
+};
+
struct uniphy_cfg {
const struct uniphy_init_tbl *init_seq;
int num_init_seq;
@@ -83,6 +93,32 @@ static const struct uniphy_cfg ipq4019_usb_hsphy_cfg = {
.reset_udelay = 10000,
};
+static const char * const ipq5332_usb_ssphy_clk_l[] = {
+ "phy_ahb", "phy_cfg_ahb", "pipe",
+};
+
+static const char * const ipq5332_usb_ssphy_reset_l[] = {
+ "por_rst",
+};
+
+static const char * const ipq5332_usb_ssphy_vreg_l[] = {
+ "vdda-phy",
+};
+
+static const struct uniphy_cfg ipq5332_usb_ssphy_cfg = {
+ .init_seq = ipq5332_usb_ssphy_init_tbl,
+ .num_init_seq = ARRAY_SIZE(ipq5332_usb_ssphy_init_tbl),
+ .clk_list = ipq5332_usb_ssphy_clk_l,
+ .num_clks = ARRAY_SIZE(ipq5332_usb_ssphy_clk_l),
+ .reset_list = ipq5332_usb_ssphy_reset_l,
+ .num_resets = ARRAY_SIZE(ipq5332_usb_ssphy_reset_l),
+ .vreg_list = ipq5332_usb_ssphy_vreg_l,
+ .num_vregs = ARRAY_SIZE(ipq5332_usb_ssphy_vreg_l),
+ .pipe_clk_rate = 250000000,
+ .reset_udelay = 1,
+ .autoload_udelay = 35,
+};
+
static int phy_mux_sel(struct phy *phy)
{
struct qcom_uniphy *uniphy = phy_get_drvdata(phy);
@@ -396,6 +432,7 @@ static int qcom_uniphy_probe(struct platform_device *pdev)
static const struct of_device_id qcom_uniphy_of_match[] = {
{ .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hsphy_cfg},
{ .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ssphy_cfg},
+ { .compatible = "qcom,ipq5332-usb-ssphy", .data = &ipq5332_usb_ssphy_cfg},
{ },
};
MODULE_DEVICE_TABLE(of, qcom_uniphy_of_match);
--
2.34.1
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