lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 30 Aug 2023 19:17:15 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     Alex Bee <knaerzche@...il.com>, Heiko Stuebner <heiko@...ech.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     Johan Jonker <jbx6244@...il.com>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 5/5] ARM: dts: rockchip: Disable non-required timers
 for RK3128

On 2023-08-29 21:37, Alex Bee wrote:
> The Rockchip timer linux driver can handle a maximum of 2 timers and will
> get confused if more of them exist.

Wouldn't it be better to fix that? It looks trivial to do, and frankly 
it's a behaviour that doesn't make sense anyway. Of course a system can 
have more hardware available than Linux wants to use; that's not an 
error, it's just Linux's choice to not use it! See commit a98399cbc1e0 
("clocksource/drivers/sp804: Avoid error on multiple instances") for 
example.

DTs shouldn't be treated like Linux board files, so curating them around 
Linux-specific driver behaviour is inappropriate; FreeBSD or U-Boot or 
whatever are perfectly entitled to make use of 5 timers at once if they can.

Thanks,
Robin.

> RK3128 only needs timer0, timer1 and timer5. The latter is the source
> for the arm-timer and it's clock is prevented from being disabled in the
> clock driver so it can get disabled in the device tree, too.
> 
> Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
> Signed-off-by: Alex Bee <knaerzche@...il.com>
> ---
>   arch/arm/boot/dts/rockchip/rk3128.dtsi | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
> index 88a4b0d6d928..f3f0788195d2 100644
> --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
> +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
> @@ -252,6 +252,7 @@ timer2: timer@...44040 {
>   		interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
>   		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER2>;
>   		clock-names = "pclk", "timer";
> +		status = "disabled";
>   	};
>   
>   	timer3: timer@...44060 {
> @@ -260,6 +261,7 @@ timer3: timer@...44060 {
>   		interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
>   		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER3>;
>   		clock-names = "pclk", "timer";
> +		status = "disabled";
>   	};
>   
>   	timer4: timer@...44080 {
> @@ -268,6 +270,7 @@ timer4: timer@...44080 {
>   		interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
>   		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER4>;
>   		clock-names = "pclk", "timer";
> +		status = "disabled";
>   	};
>   
>   	timer5: timer@...440a0 {
> @@ -276,6 +279,7 @@ timer5: timer@...440a0 {
>   		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
>   		clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER5>;
>   		clock-names = "pclk", "timer";
> +		status = "disabled";
>   	};
>   
>   	watchdog: watchdog@...4c000 {

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ