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Message-ID: <49fbae87-ce09-23af-6bcd-459b5646e680@nexus-software.ie>
Date:   Thu, 31 Aug 2023 21:19:54 +0100
From:   Bryan O'Donoghue <pure.logic@...us-software.ie>
To:     Ziyang Huang <hzyitc@...look.com>, agross@...nel.org
Cc:     andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        quic_gokulsri@...cinc.com, quic_srichara@...cinc.com,
        quic_varada@...cinc.com, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: ipq5018: Correct uart1_pins pinconf

On 31/08/2023 17:34, Ziyang Huang wrote:
> In pinctrl, the pinconfigs for uart are named "blspX_uartY".
>    X is the UART ID. Starts from 1.
>      1-6 are in BLSP Block 1.
>      7-12 are in BLSP Block 2.
>    Y is the index of mux config. Starts from 0.
> 
> In dts, the serials are also named "blspX_uartY", but with different logic.
>    X is the BLSP Block ID. Starts from 1.
>    Y is the uart id inside block.
>      In "ipq6018.dtsi" and "ipq8074.dtsi", it starts from 1.
>      But in "ipq5332.dtsi" and "ipq9574.dtsi", it starts from 0.
> 
> +-----------------+-----------------+-------------+-----------------+
> |     Block ID    | ID inside Block |  dts name   | pinconfig name  |
> | (Starts from 1) | (Starts from 1) |             |                 |
> +-----------------+-----------------+-------------+-----------------+
> |        1        |        1        | blsp1_uart1 |   blsp0_uartY   |
> |        1        |        2        | blsp1_uart2 |   blsp1_uartY   |
> |        1        |        6        | blsp1_uart6 |   blsp5_uartY   |
> |        2        |        1        | blsp2_uart1 |   blsp6_uartY   |
> |        2        |        6        | blsp2_uart6 |   blsp12_uartY  |
> +-----------------+-----------------+-------------+-----------------+
> 
> In "ipq5018.dts", "blsp1_uart1" (dts name) is the first serial (confimed
> by the address), So its pinconfig should be "blsp0_uart0" (pinconfig name,
> use GPIO 20 and 21) or "blsp0_uart1" (pinconfig name, use GPIO 28 and 29).
> 
> Fixes: 570006756a16 ("arm64: dts: Add ipq5018 SoC and rdp432-c2 board support")
> Signed-off-by: Ziyang Huang <hzyitc@...look.com>
> ---
> Changes since v1
> - Use corrent name in From
> 
>   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> index 9f13d2dcdfd5..91b98020e1c6 100644
> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> @@ -104,10 +104,10 @@ tlmm: pinctrl@...0000 {
>   			#interrupt-cells = <2>;
>   
>   			uart1_pins: uart1-state {
> -				pins = "gpio31", "gpio32", "gpio33", "gpio34";
> -				function = "blsp1_uart1";
> +				pins = "gpio28", "gpio29";
> +				function = "blsp0_uart1";
>   				drive-strength = <8>;
> -				bias-pull-down;
> +				bias-disabled;
>   			};
>   		};
>   

So this change will have the effect of changing the console on 
ipq5018-rdp432 from gpio31-gpio34 to gpio28, gpio29.

Have you verified that change on hardware or the schematic ?

https://forum.openwrt.org/t/add-support-for-xiaomi-redmi-ax5400-white-version/140879/22?page=2

This has the wrong UART pinout ?

Is this change something that should be expressed for a particular board ?

---
bod

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