linux-kernel - Re: [PATCH 3/4] dt-bindings: clock: qcom: Add GCC clocks for SM4450

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Message-ID: <7d4a2cd5-291c-e058-9834-1d7eaf911821@quicinc.com>
Date:   Thu, 31 Aug 2023 15:30:19 +0530
From:   Ajit Pandey <quic_ajipan@...cinc.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        "Michael Turquette" <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        "Rob Herring" <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Taniya Das <quic_tdas@...cinc.com>,
        Imran Shaik <quic_imrashai@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>
CC:     <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/4] dt-bindings: clock: qcom: Add GCC clocks for SM4450



On 8/24/2023 11:40 PM, Krzysztof Kozlowski wrote:
> On 24/08/2023 19:34, Ajit Pandey wrote:
>> Add support for qcom global clock controller bindings for SM4450 platform.
>>
>> Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>
>> ---
>>   .../bindings/clock/qcom,sm4450-gcc.yaml       |  54 +++++
>>   include/dt-bindings/clock/qcom,sm4450-gcc.h   | 197 ++++++++++++++++++
>>   2 files changed, 251 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml
>>   create mode 100644 include/dt-bindings/clock/qcom,sm4450-gcc.h
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml
>> new file mode 100644
>> index 000000000000..8c767bdf7f9d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm4450-gcc.yaml
>> @@ -0,0 +1,54 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,sm4450-gcc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Global Clock & Reset Controller on SM4450
>> +
>> +maintainers:
>> +  - Ajit Pandey <quic_ajipan@...cinc.com>
>> +  - Taniya Das <quic_tdas@...cinc.com>
>> +
>> +description: |
>> +  Qualcomm global clock control module provides the clocks, resets and power
>> +  domains on SM4450
>> +
>> +  See also:: include/dt-bindings/clock/qcom,sm4450-gcc.h
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sm4450-gcc
>> +
>> +  clocks:
>> +    items:
>> +      - description: Board XO source
>> +      - description: Sleep clock source
>> +      - description: UFS Phy Rx symbol 0 clock source (Optional clock)
>> +      - description: UFS Phy Rx symbol 1 clock source (Optional clock)
>> +      - description: UFS Phy Tx symbol 0 clock source (Optional clock)
>> +      - description: USB3 Phy wrapper pipe clock source (Optional clock)
> 
> I doubt that these are really optional clocks. They are set as parents
> of your clocks in the controller, so if these clocks are physically
> missing, how does the clock controller work?
> 
> 
> Best regards,
> Krzysztof
> 

Yeah, if these optional clocks are missing, few dependent child clocks 
functionality (UFS/USB) will not work and clock controller will work 
with limited functionality, but I agree that the tag "Optional Clock" is 
bit confusing here and will remove this in next patch series.

-- 
Thanks, and Regards
Ajit