linux-kernel - [PATCH v3] arm64: dts: ipq5018: Correct uart1

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Message-ID: <TYZPR01MB5556D24A77DAFA013F93B551C9E4A@TYZPR01MB5556.apcprd01.prod.exchangelabs.com>
Date:   Fri,  1 Sep 2023 22:10:42 +0800
From:   Ziyang Huang <hzyitc@...look.com>
To:     agross@...nel.org
Cc:     andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        quic_gokulsri@...cinc.com, quic_srichara@...cinc.com,
        quic_varada@...cinc.com, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Ziyang Huang <hzyitc@...look.com>
Subject: [PATCH v3] arm64: dts: ipq5018: Correct uart1_pins pinconf

In pinctrl, the pinconfigs for uart are named "blspX_uartY".
  X is the UART ID. Starts from 1.
    1-6 are in BLSP Block 1.
    7-12 are in BLSP Block 2.
  Y is the index of mux config. Starts from 0.

In dts, the serials are also named "blspX_uartY", but with different logic.
  X is the BLSP Block ID. Starts from 1.
  Y is the uart id inside block.
    In "ipq6018.dtsi" and "ipq8074.dtsi", it starts from 1.
    But in "ipq5332.dtsi" and "ipq9574.dtsi", it starts from 0.

+-----------------+-----------------+-------------+-----------------+
|     Block ID    | ID inside Block |  dts name   | pinconfig name  |
| (Starts from 1) | (Starts from 1) |             |                 |
+-----------------+-----------------+-------------+-----------------+
|        1        |        1        | blsp1_uart1 |   blsp0_uartY   |
|        1        |        2        | blsp1_uart2 |   blsp1_uartY   |
|        1        |        6        | blsp1_uart6 |   blsp5_uartY   |
|        2        |        1        | blsp2_uart1 |   blsp6_uartY   |
|        2        |        6        | blsp2_uart6 |   blsp12_uartY  |
+-----------------+-----------------+-------------+-----------------+

In "ipq5018.dts", "blsp1_uart1" (dts name) is the first serial (confimed
by the address), So its pinconfig should be "blsp0_uart0" (pinconfig name,
use GPIO 20 and 21) or "blsp0_uart1" (pinconfig name, use GPIO 28 and 29).

Fixes: 570006756a16 ("arm64: dts: Add ipq5018 SoC and rdp432-c2 board support")
Signed-off-by: Ziyang Huang <hzyitc@...look.com>
---
Changes since v1:
- Use corrent name in From

Changes since v2:
- Define 2 pinconfs for uart1 in ipq5018.dtsi
- rdp432-c2 use uart1_pins_a

 arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts |  2 +-
 arch/arm64/boot/dts/qcom/ipq5018.dtsi          | 15 +++++++++++----
 2 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index e636a1cb9b77..e83d1863e89c 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -23,7 +23,7 @@ chosen {
 };
 
 &blsp1_uart1 {
-	pinctrl-0 = <&uart1_pins>;
+	pinctrl-0 = <&uart1_pins_a>;
 	pinctrl-names = "default";
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
index 9f13d2dcdfd5..50b4a2bd6fd3 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
@@ -103,11 +103,18 @@ tlmm: pinctrl@...0000 {
 			interrupt-controller;
 			#interrupt-cells = <2>;
 
-			uart1_pins: uart1-state {
-				pins = "gpio31", "gpio32", "gpio33", "gpio34";
-				function = "blsp1_uart1";
+			uart1_pins_a: uart1@0 {
+				pins = "gpio20", "gpio21";
+				function = "blsp0_uart0";
 				drive-strength = <8>;
-				bias-pull-down;
+				bias-disabled;
+			};
+
+			uart1_pins_b: uart1@1 {
+				pins = "gpio28", "gpio29";
+				function = "blsp0_uart1";
+				drive-strength = <8>;
+				bias-disabled;
 			};
 		};
 
-- 
2.40.1