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Message-Id: <20230901142028.298051-1-kan.liang@linux.intel.com>
Date: Fri, 1 Sep 2023 07:20:28 -0700
From: kan.liang@...ux.intel.com
To: peterz@...radead.org, mingo@...hat.com,
linux-kernel@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>,
Stephane Eranian <eranian@...gle.com>,
Yunying Sun <yunying.sun@...el.com>
Subject: [PATCH] perf/x86/uncore: Correct the number of CHAs on EMR
From: Kan Liang <kan.liang@...ux.intel.com>
The MSR UNC_CBO_CONFIG, which was used to detect the number of CHAs on
SPR, is broken on EMR XCC. It always returns 0.
Roll back to the discovery method, which can give the correct number for
this case.
Fixes: 38776cc45eb7 ("perf/x86/uncore: Correct the number of CHAs on SPR")
Reported-by: Stephane Eranian <eranian@...gle.com>
Reported-by: Yunying Sun <yunying.sun@...el.com>
Tested-by: Yunying Sun <yunying.sun@...el.com>
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
---
arch/x86/events/intel/uncore_snbep.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index d49e90dc04a4..c41d7d46481c 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -6475,7 +6475,9 @@ void spr_uncore_cpu_init(void)
type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA);
if (type) {
rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);
- type->num_boxes = num_cbo;
+ /* The MSR doesn't work on the EMR XCC. Roll back to the discovery method. */
+ if (num_cbo)
+ type->num_boxes = num_cbo;
}
spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO);
}
--
2.35.1
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