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Message-Id: <20230904152100.30404-5-quic_nitirawa@quicinc.com>
Date: Mon, 4 Sep 2023 20:50:59 +0530
From: Nitin Rawat <quic_nitirawa@...cinc.com>
To: mani@...nel.org, agross@...nel.org, andersson@...nel.org,
konrad.dybcio@...aro.org, jejb@...ux.ibm.com,
martin.petersen@...cle.com
Cc: quic_cang@...cinc.com, quic_nguyenb@...cinc.com,
linux-scsi@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
Nitin Rawat <quic_nitirawa@...cinc.com>,
Naveen Kumar Goud Arepalli <quic_narepall@...cinc.com>
Subject: [PATCH V7 4/5] scsi: ufs: qcom: Align programing of unipro clk attributes
Currently CORE_CLK_1US_CYCLES, PA_VS_CORE_CLK_40NS_CYCLES are configured
in clk scaling post change ops. This is not aligning to HPG.
Move this to clk scaling pre change ops to align completely with hardware
specification.
Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@...cinc.com>
Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@...cinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@...cinc.com>
---
drivers/ufs/host/ufs-qcom.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index a4855f0b93b0..d437c75c8e14 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1416,12 +1416,6 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up)
}
static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba)
-{
- /* nothing to do as of now */
- return 0;
-}
-
-static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)
{
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
@@ -1432,6 +1426,11 @@ static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)
return ufs_qcom_set_core_clk_ctrl(hba, true);
}
+static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)
+{
+ return 0;
+}
+
static int ufs_qcom_clk_scale_down_pre_change(struct ufs_hba *hba)
{
struct ufs_qcom_host *host = ufshcd_get_variant(hba);
--
2.17.1
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