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Message-ID: <ZPein8oS5egqGwzp@shell.armlinux.org.uk>
Date: Tue, 5 Sep 2023 22:50:23 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Puranjay Mohan <puranjay12@...il.com>
Cc: Alexei Starovoitov <ast@...nel.org>,
Daniel Borkmann <daniel@...earbox.net>,
Andrii Nakryiko <andrii@...nel.org>,
Martin KaFai Lau <martin.lau@...ux.dev>,
Song Liu <song@...nel.org>,
Yonghong Song <yonghong.song@...ux.dev>,
John Fastabend <john.fastabend@...il.com>,
KP Singh <kpsingh@...nel.org>,
Stanislav Fomichev <sdf@...gle.com>,
Hao Luo <haoluo@...gle.com>, Jiri Olsa <jolsa@...nel.org>,
Shubham Bansal <illusionist.neo@...il.com>,
Mykola Lysenko <mykolal@...com>, Shuah Khan <shuah@...nel.org>,
bpf@...r.kernel.org, linux-kselftest@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH bpf-next 6/8] arm32, bpf: add support for 64 bit division
instruction
On Tue, Sep 05, 2023 at 09:06:19PM +0000, Puranjay Mohan wrote:
> +cont:
> +
> + /* Call appropriate function */
> + if (sign)
> + emit_mov_i(ARM_IP, op == BPF_DIV ? (u32)jit_sdiv64 : (u32)jit_smod64, ctx);
> + else
> + emit_mov_i(ARM_IP, op == BPF_DIV ? (u32)jit_udiv64 : (u32)jit_mod64, ctx);
Same comment as the previous patch here.
> +
> + emit_blx_r(ARM_IP, ctx);
> +
> + /* Save return value */
> + if (rd[1] != ARM_R0) {
> + emit(ARM_MOV_R(rd[0], ARM_R1), ctx);
> + emit(ARM_MOV_R(rd[1], ARM_R0), ctx);
> + }
> +
> + /* Recover {R1, R0} from stack if it is not Rd */
> + if (rd[1] != ARM_R0)
> + emit(ARM_POP(BIT(ARM_R0) | BIT(ARM_R1)), ctx);
> + else
> + emit(ARM_ADD_I(ARM_SP, ARM_SP, 8), ctx);
> +
> + /* Recover {R3, R2} from stack if it is not Rd */
> + if (rd[1] != ARM_R2)
> + emit(ARM_POP(BIT(ARM_R2) | BIT(ARM_R3)), ctx);
> + else
> + emit(ARM_ADD_I(ARM_SP, ARM_SP, 8), ctx);
if (rd[1] != ARM_R0) {
emit(ARM_POP(BIT(ARM_R0) | BIT(ARM_R1)), ctx);
emit(ARM_ADD_I(ARM_SP, ARM_SP, 8), ctx);
} else if (rd[1] != ARM_R2) {
emit(ARM_ADD_I(ARM_SP, ARM_SP, 8), ctx);
emit(ARM_POP(BIT(ARM_R2) | BIT(ARM_R3)), ctx);
} else {
emit(ARM_ADD_I(ARM_SP, ARM_SP, 16), ctx);
}
Hmm?
--
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