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Message-ID: <CAJM55Z-3feN9sw6MSqdHPkG8U-VyosAr7pHRynnQ+nZpbCQKkQ@mail.gmail.com>
Date:   Tue, 5 Sep 2023 16:46:53 +0200
From:   Emil Renner Berthing <emil.renner.berthing@...onical.com>
To:     Jisheng Zhang <jszhang@...nel.org>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Andrew Jones <ajones@...tanamicro.com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/3] riscv: vdso.lds.S: some improvement

On Wed, 26 Jul 2023 at 19:44, Jisheng Zhang <jszhang@...nel.org> wrote:
> This series renews one of my last year RFC patch[1], tries to improve
> the vdso layout a bit.
>
> patch1 removes useless symbols
> patch2 merges .data section of vdso into .rodata because they are
> readonly
> patch3 is the real renew patch, it removes hardcoded 0x800 .text start
> addr. But I rewrite the commit msg per Andrew's suggestions and move
> move .note, .eh_frame_hdr, and .eh_frame between .rodata and .text to
> keep the actual code well away from the non-instruction data.
>
> Link: https://lore.kernel.org/linux-riscv/20221123161805.1579-1-jszhang@kernel.org/ [1]

Works fine on the VisionFive 2 and Unmatched.
Tested-by: Emil Renner Berthing <emil .renner.berthing@...onical.com>


> Jisheng Zhang (3):
>   riscv: vdso.lds.S: drop __alt_start and __alt_end symbols
>   riscv: vdso.lds.S: merge .data section into .rodata section
>   riscv: vdso.lds.S: remove hardcoded 0x800 .text start addr
>
>  arch/riscv/kernel/vdso/vdso.lds.S | 30 +++++++++++++-----------------
>  1 file changed, 13 insertions(+), 17 deletions(-)
>
> --
> 2.40.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv

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