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Message-ID: <20230905162739.GA175146@bhelgaas>
Date:   Tue, 5 Sep 2023 11:27:39 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Achal Verma <a-verma1@...com>
Cc:     Vignesh Raghavendra <vigneshr@...com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczy_ski <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-omap@...r.kernel.org, linux-pci@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC PATCH 2/2] pci: j721e: Enable reference clock output from
 serdes

Previous j721e subject line history is like this:

  c86f4bd6008e ("PCI: j721e: Convert to platform remove callback returning void")
  053ca37c87af ("PCI: j721e: Initialize pcie->cdns_pcie before using it")
  19e863828acf ("PCI: j721e: Drop redundant struct device *")
  72de208f2bda ("PCI: j721e: Drop pointless of_device_get_match_data() cast")
  496bb18483cc ("PCI: j721e: Fix j721e_pcie_probe() error path")
  c8a375a8e15a ("PCI: j721e: Add PCIe support for AM64")

Match capitalization style, i.e., "PCI: " instead of "pci: "

On Tue, Sep 05, 2023 at 05:18:16PM +0530, Achal Verma wrote:
> PCIe1 in J7AHP EVM has EP side connector reference clock connection from
> serdes named SOC_SERDES0_REFCLK(PCIE_REFCLK_OUT) unlike PCIe0 which has
> reference clock connection from on-board serdes. To enable this reference
> clock out, ACSPCIE clock buffer pads have to be enabled.
> 
> This change enables ACSPCIE clock buffer pads and select clock source for
> reference clock output.

s/This change enables/Enable/
s/and select/and selects/

> +static int j721e_enable_acspcie(struct j721e_pcie *pcie)
> +{
> +	struct device *dev = pcie->cdns_pcie->dev;
> +	struct device_node *node = dev->of_node;
> +	struct of_phandle_args args;
> +	unsigned int lock2_kick0_offset, lock2_kick1_offset;
> +	unsigned int acspcie_pad_offset, refclk_clksel_offset;
> +	unsigned int refclk_clksel_source;
> +	struct regmap *syscon;
> +	u32 val = 0, mask = 0;

Looks like these initializations are unnecessary?

> +	syscon = syscon_regmap_lookup_by_phandle(node, "ti,syscon-pcie-refclk-out");

Looks like this and the of_parse_phandle_with_fixed_args() below don't
fit in 80 columns like the rest of the file.

> +	ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-pcie-refclk-out", 5,
> +						0, &args);

> +	/* Enable ACSPCIe PADS  */

Spurious extra space at end of comment.

> +	/*
> +	 * Enable ACSPCIe clock buffer to source out reference clock for EP
> +	 */

Looks like it could be a single-line comment, e.g.,

  /* Enable ACSPCIe clock buffer to source out reference clock for EP */

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