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Message-ID: <20230905181402.GA3673113-robh@kernel.org>
Date: Tue, 5 Sep 2023 13:14:02 -0500
From: Rob Herring <robh@...nel.org>
To: Sascha Hauer <s.hauer@...gutronix.de>
Cc: linux-rockchip@...ts.infradead.org,
Heiko Stuebner <heiko@...ech.de>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-gpio@...r.kernel.org,
kernel@...gutronix.de,
Quentin Schulz <quentin.schulz@...obroma-systems.com>,
Michael Riesch <michael.riesch@...fvision.net>,
Linus Walleij <linus.walleij@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Subject: Re: [PATCH 2/3] dt-bindings: pinctrl: rockchip: Add io domain
properties
On Mon, Sep 04, 2023 at 01:58:15PM +0200, Sascha Hauer wrote:
> Add rockchip,io-domains property to the Rockchip pinctrl driver. This
> list of phandles points to the IO domain device(s) the pins of the
> pinctrl driver are supplied from.
Is there an actual need for multiple IO devices with multiple pinctrl
blocks? If not, you don't need a property, just lookup the IO domain
node by compatible.
>
> Also a rockchip,io-domain-boot-on property is added to pin groups
> which can be used for pin groups which themselves are needed to access
> the regulators an IO domain is driven from.
>
> Signed-off-by: Sascha Hauer <s.hauer@...gutronix.de>
> ---
> .../bindings/pinctrl/rockchip,pinctrl.yaml | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
> index 10c335efe619e..92075419d29cf 100644
> --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml
> @@ -62,6 +62,11 @@ properties:
> Required for at least rk3188 and rk3288. On the rk3368 this should
> point to the PMUGRF syscon.
>
> + rockchip,io-domains:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandles to io domains
> +
> "#address-cells":
> enum: [1, 2]
>
> @@ -137,7 +142,13 @@ additionalProperties:
> - description:
> The phandle of a node contains the generic pinconfig options
> to use as described in pinctrl-bindings.txt.
> -
> + rockchip,io-domain-boot-on:
> + type: boolean
> + description:
> + If true assume that the io domain needed for this pin group has been
> + configured correctly by the bootloader. This is needed to break cyclic
> + dependencies introduced when a io domain needs a regulator that can be
> + accessed through pins configured here.
> examples:
> - |
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> --
> 2.39.2
>
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