linux-kernel - Re: [PATCH 2/4] clk: qcom: branch: Add mem ops support for branch2 clocks

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Wed, 6 Sep 2023 11:37:10 +0530
From:   Imran Shaik <quic_imrashai@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>
CC:     Taniya Das <quic_tdas@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Ajit Pandey <quic_ajipan@...cinc.com>,
        Jagadeesh Kona <quic_jkona@...cinc.com>
Subject: Re: [PATCH 2/4] clk: qcom: branch: Add mem ops support for branch2
 clocks



On 8/10/2023 1:27 AM, Konrad Dybcio wrote:
> On 8.08.2023 07:14, Imran Shaik wrote:
>> From: Taniya Das <quic_tdas@...cinc.com>
>>
>> Clock CBCRs with memories need an update for memory before enable/disable
>> of the clock. Add support for the mem ops to handle this sequence.
>>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> Signed-off-by: Imran Shaik <quic_imrashai@...cinc.com>
>> ---
> Could you expand the commit message a bit? What does this clock
> memory do?
> 

Sure, will expand the commit message with more details and push the next 
series.

> [..]
> 
>> +static int clk_branch2_mem_enable(struct clk_hw *hw)
>> +{
>> +	struct clk_branch *br = to_clk_branch(hw);
>> +	u32 val;
>> +	int count = 200;
>> +
>> +	regmap_update_bits(br->clkr.regmap, br->mem_enable_reg,
>> +			br->mem_enable_ack_bit, br->mem_enable_ack_bit);
>> +
>> +	regmap_read(br->clkr.regmap, br->mem_ack_reg, &val);
>> +
>> +	while (count-- > 0) {
>> +		if (val & br->mem_enable_ack_bit)
>> +			return clk_branch2_enable(hw);
>> +		udelay(1);
>> +		regmap_read(br->clkr.regmap, br->mem_ack_reg, &val);
>> +	}
> readl_poll_timeout?
> 

Sure, will check and use this.

Thanks,
Imran

> Konrad