[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230906110918.1501376-1-sharath.kumar.d.m@intel.com>
Date: Wed, 6 Sep 2023 16:39:16 +0530
From: sharath.kumar.d.m@...el.com
To: lpieralisi@...nel.org, kw@...ux.com, robh@...nel.org,
bhelgaas@...gle.com, linux-pci@...r.kernel.org, dinguyen@...nel.org
Cc: linux-kernel@...r.kernel.org,
D M Sharath Kumar <sharath.kumar.d.m@...el.com>
Subject: [PATCH v2 0/2] PCI: Altera: add support to Agilex family
From: D M Sharath Kumar <sharath.kumar.d.m@...el.com>
added new callback for
1) read,write to root port configuration registers
2) read,write to endpoint configuration registers
3) root port interrupt handler
agilex and newer platforms need to implemant the callback and generic root port driver should work ( without much changes ) , legacy platforms (arria and startix) implement configuration read,write directly in wrapper api _altera_pcie_cfg_read/_altera_pcie_cfg_write
changelog v2:
saperated into two patches
1.refactored the driver for easily portability to future Altera FPGA
platforms
2.added support for "Agilex" FPGA
this driver supports PCI RP IP on Agilex FPGA, as these are FPGA its up
to the user to add PCI RP or not ( as per his needs). we are not adding
the device tree as part of this commit. we are expecting the add device
tree changes only if he is adding PCI RP IP in his design
D M Sharath Kumar (2):
PCI: altera: refactor driver for supporting new platform
PCI: altera: add suport for Agilex Family FPGA
drivers/pci/controller/pcie-altera.c | 313 ++++++++++++++++++++++++---
1 file changed, 283 insertions(+), 30 deletions(-)
--
2.34.1
Powered by blists - more mailing lists