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Message-ID: <0e54ca7e-0416-8969-d9ba-c476ae2f6c5b@quicinc.com>
Date: Thu, 7 Sep 2023 11:31:41 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
<manivannan.sadhasivam@...aro.org>
CC: <helgaas@...nel.org>, <linux-pci@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_vbadigan@...cinc.com>, <quic_nitegupt@...cinc.com>,
<quic_skananth@...cinc.com>, <quic_ramkri@...cinc.com>,
<quic_parass@...cinc.com>, <krzysztof.kozlowski@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>
Subject: Re: [PATCH v4 1/4] dt-bindings: pci: qcom: Add opp table
On 8/22/2023 9:36 PM, Konrad Dybcio wrote:
> On 22.08.2023 17:12, Krishna chaitanya chundru wrote:
>> PCIe needs to choose the appropriate performance state of RPMH power
>> domain based upon the PCIe gen speed.
>>
>> Adding the Operating Performance Points table allows to adjust power domain
>> performance state, depending on the PCIe gen speed.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>> ---
> I only got patches 1, 2 and 4 of this series.
>
> Please consider using the b4 tool [1], which takes care of
> all of the sending shenanigans for you.
>
> Konrad
>
> [1] https://b4.docs.kernel.org/en/latest/index.html
Sorry, for late reply I have taken care of this in next patch series.
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