linux-kernel - Re: [PATCH v5 2/5] arm64: dts: qcom: sm8450: Add opp table support to PCIe

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Message-ID: <347293d1-15e5-5412-9695-01be768283ad@quicinc.com>
Date:   Thu, 7 Sep 2023 15:26:45 +0530
From:   Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>, <agross@...nel.org>,
        <andersson@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <vireshk@...nel.org>, <nm@...com>,
        <sboyd@...nel.org>, <mani@...nel.org>
CC:     <lpieralisi@...nel.org>, <kw@...ux.com>, <robh@...nel.org>,
        <bhelgaas@...gle.com>, <rafael@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-pm@...r.kernel.org>, <quic_vbadigan@...cinc.com>,
        <quic_nitegupt@...cinc.com>, <quic_skananth@...cinc.com>,
        <quic_ramkri@...cinc.com>, <quic_parass@...cinc.com>
Subject: Re: [PATCH v5 2/5] arm64: dts: qcom: sm8450: Add opp table support to
 PCIe


On 9/7/2023 2:34 PM, Konrad Dybcio wrote:
> On 7.09.2023 08:00, Krishna chaitanya chundru wrote:
>> PCIe needs to choose the appropriate performance state of RPMH power
>> domain based up on the PCIe gen speed.
>>
>> So let's add the OPP table support to specify RPMH performance states.
>>
>> Use opp-level for the PCIe gen speed for easier use.
>>
>> Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
>> ---
> [...]
>
>> +
>> +			pcie1_opp_table: opp-table {
>> +				compatible = "operating-points-v2";
>> +
>> +				opp-1 {
>> +					opp-level = <1>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
>> +				};
>> +
>> +				opp-2 {
>> +					opp-level = <2>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
>> +				};
>> +
>> +				opp-3 {
>> +					opp-level = <3>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
> Is gen3 not supposed to require nom like on pcie0?
This particular controller instance can operate at low svs for GEN3.
> Also, can all non-maximum OPPs run at just low_svs?
This depends on the hardware capability, for this instance expect GEN4 
remaining can operate in LOW svs. It varies from controller instance to 
instance and also from target to target.
> Konrad

- KC