linux-kernel - Re: [PATCH v4 1/2] irqchip/qcom-pdc: Add support for v3.2 HW

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Date:   Thu, 7 Sep 2023 09:57:05 +0200
From:   Neil Armstrong <neil.armstrong@...aro.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>
Cc:     "Maulik Shah (mkshah)" <quic_mkshah@...cinc.com>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Subject: Re: [PATCH v4 1/2] irqchip/qcom-pdc: Add support for v3.2 HW

Hi,

On 06/09/2023 18:55, Konrad Dybcio wrote:
> On 5.09.2023 15:19, Neil Armstrong wrote:
>> Starting from HW version 3.2 the IRQ_ENABLE bit has moved to the
>> IRQ_i_CFG register and requires a change of the driver to avoid
>> writing into an undefined register address.
>>
>> Get the HW version from registers and set the IRQ_ENABLE bit to the
>> correct register depending on the HW version.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Reviewed-by: Maulik Shah <quic_mkshah@...cinc.com>
>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>> ---
> [...]
> 
>> +	if (pdc_version < PDC_VERSION_3_2) {
>> +		u32 index, mask;
>> +
>> +		index = pin_out / 32;
>> +		mask = pin_out % 32;
> I get that you're moving around existing code, but would that
> not be equal to FIELD_GET() with GENMASK(31, 5) and GENMASK(4, 0)?
> Perhaps it'd be clearer to read. But don't worry about it in this
> series.

Yes it would, I took the best implementation of the two :-p

I will probably send a cleanup serie afterwards because there's some
cleanup to do all over the code.

Neil

> 
> Otherwise:
> 
> Acked-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> 
> Konrad