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Message-ID: <ZPoMAGYlIxPZsE7+@ghost>
Date:   Thu, 7 Sep 2023 10:44:32 -0700
From:   Charlie Jenkins <charlie@...osinc.com>
To:     Conor Dooley <conor@...nel.org>
Cc:     Palmer Dabbelt <palmer@...belt.com>,
        Samuel Holland <samuel.holland@...ive.com>,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v2 1/5] riscv: Checksum header

On Thu, Sep 07, 2023 at 10:40:54AM +0100, Conor Dooley wrote:
> Hey Charlie,
> 
> Just a passing thought that I can't really test since I am meant to be
> on holidays...
> 
> On Tue, Sep 05, 2023 at 09:46:50PM -0700, Charlie Jenkins wrote:
> > Provide checksum algorithms that have been designed to leverage riscv
> > instructions such as rotate. In 64-bit, can take advantage of the larger
> > register to avoid some overflow checking.
> > 
> > Signed-off-by: Charlie Jenkins <charlie@...osinc.com>
> > ---
> >  arch/riscv/include/asm/checksum.h | 96 +++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 96 insertions(+)
> > 
> > diff --git a/arch/riscv/include/asm/checksum.h b/arch/riscv/include/asm/checksum.h
> > new file mode 100644
> > index 000000000000..573714b9ea15
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/checksum.h
> > @@ -0,0 +1,96 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * IP checksum routines
> > + *
> > + * Copyright (C) 2023 Rivos Inc.
> > + */
> > +#ifndef __ASM_RISCV_CHECKSUM_H
> > +#define __ASM_RISCV_CHECKSUM_H
> > +
> > +#include <linux/in6.h>
> > +#include <linux/uaccess.h>
> > +
> > +#ifdef CONFIG_32BIT
> > +typedef unsigned int csum_t;
> > +#else
> > +typedef unsigned long csum_t;
> > +#endif
> > +
> > +/*
> > + *	Fold a partial checksum without adding pseudo headers
> > + */
> > +static inline __sum16 csum_fold(__wsum sum)
> > +{
> > +	sum += (sum >> 16) | (sum << 16);
> > +	return (__force __sum16)(~(sum >> 16));
> > +}
> > +
> > +#define csum_fold csum_fold
> > +
> > +/*
> > + * Quickly compute an IP checksum with the assumption that IPv4 headers will
> > + * always be in multiples of 32-bits, and have an ihl of at least 5.
> > + * @ihl is the number of 32 bit segments and must be greater than or equal to 5.
> > + * @iph is assumed to be word aligned.
> > + */
> > +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
> > +{
> > +	csum_t csum = 0;
> > +	int pos = 0;
> > +
> > +	do {
> > +		csum += ((const unsigned int *)iph)[pos];
> > +#ifdef CONFIG_32BIT
> > +		csum += csum < ((const unsigned int *)iph)[pos];
> > +#endif // !CONFIG_32BIT
> 
> Some of this ifdeffery really should become IS_ENABLED(), there's
> nothing in some of them that can't just get removed by the compiler.
> 
> > +	} while (++pos < ihl);
> > +
> > +#ifdef CONFIG_RISCV_ISA_ZBB
> 
> This here I can't test since I'm supposed to be AFK, but can this also
> be an IS_ENABLED()? I know it is guarding code that the toolchain may
> not support, but does it get removed before that matters?
> 
> I mainly ask because there's a host of ifdeffery here & the code would
> be a lot easier to understand if we could cut it down to a minimum.
> 
> > +	if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
> > +		csum_t fold_temp;
> > +
> > +		asm_volatile_goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
> > +					      RISCV_ISA_EXT_ZBB, 1)
> > +		    :
> > +		    :
> > +		    :
> > +		    : no_zbb);
> > +#ifdef CONFIG_32BIT
> > +		asm(".option push				\n\
> > +		.option arch,+zbb				\n\
> > +			rori %[fold_temp],%[csum],16		\n\
> > +			add %[csum],%[fold_temp],%[csum]	\n\
> > +		.option pop"
> > +		: [csum] "+r" (csum), [fold_temp] "=&r" (fold_temp));
> > +#else // !CONFIG_32BIT
> > +		asm(".option push				\n\
> > +		.option arch,+zbb				\n\
> > +		    rori %[fold_temp], %[csum], 32		\n\
> > +		    add %[csum], %[fold_temp], %[csum]		\n\
> > +		    srli %[csum], %[csum], 32			\n\
> > +		    roriw %[fold_temp], %[csum], 16		\n\
> > +		    addw %[csum], %[fold_temp], %[csum]		\n\
> > +		.option pop"
> > +		: [csum] "+r" (csum), [fold_temp] "=&r" (fold_temp));
> > +#endif // !CONFIG_32BIT
> 
> These 3 I think are pretty easy to follow immediately, but...
> 
> > +		return ~(csum >> 16);
> > +	}
> > +	/*
> > +	 * ZBB only saves three instructions on 32-bit and five on 64-bit so not
> > +	 * worth checking if supported without Alternatives.
> > +	 */
> > +no_zbb:
> > +#endif // CONFIG_RISCV_ISA_ZBB
> > +#ifdef CONFIG_32BIT
> > +#else // !CONFIG_32BIT
> > +	csum += (csum >> 32) | (csum << 32);
> > +	csum >>= 16;
> > +#endif // !CONFIG_32BIT
> 
> ...these ones here could be converted too, afaict.
> 
> Thanks,
> Conor.
> 
That should make it look much cleaner, I will switch over to IS_ENABLED.

- Charlie
> > +	return csum_fold((__force __wsum)csum);
> > +}
> > +
> > +#define ip_fast_csum ip_fast_csum
> > +
> > +#include <asm-generic/checksum.h>
> > +
> > +#endif // __ASM_RISCV_CHECKSUM_H
> > 
> > -- 
> > 2.42.0
> > 


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