linux-kernel - RE: [EXT] Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property

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Message-ID: <PH0PR18MB5002C0B242B30E508793D2D8CEECA@PH0PR18MB5002.namprd18.prod.outlook.com>
Date:   Sat, 9 Sep 2023 14:06:39 +0000
From:   Linu Cherian <lcherian@...vell.com>
To:     Suzuki K Poulose <suzuki.poulose@....com>,
        "mike.leach@...aro.org" <mike.leach@...aro.org>,
        "james.clark@....com" <james.clark@....com>,
        "leo.yan@...aro.org" <leo.yan@...aro.org>
CC:     "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "coresight@...ts.linaro.org" <coresight@...ts.linaro.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Sunil Kovvuri Goutham <sgoutham@...vell.com>,
        George Cherian <gcherian@...vell.com>
Subject: RE: [EXT] Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add
 "memory-region" property

Hi Suzuki,

> -----Original Message-----
> From: Suzuki K Poulose <suzuki.poulose@....com>
> Sent: Monday, September 4, 2023 1:57 PM
> To: Linu Cherian <lcherian@...vell.com>; mike.leach@...aro.org;
> james.clark@....com; leo.yan@...aro.org
> Cc: linux-arm-kernel@...ts.infradead.org; coresight@...ts.linaro.org; linux-
> kernel@...r.kernel.org; robh+dt@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; conor+dt@...nel.org;
> devicetree@...r.kernel.org; Sunil Kovvuri Goutham
> <sgoutham@...vell.com>; George Cherian <gcherian@...vell.com>
> Subject: [EXT] Re: [RFC PATCH v3 1/7] dt-bindings: arm: coresight-tmc: Add
> "memory-region" property
> 
> External Email
> 
> ----------------------------------------------------------------------
> On 04/09/2023 06:05, Linu Cherian wrote:
> > memory-region 0: Reserved trace buffer memory
> >
> >    TMC ETR: When available, use this reserved memory region for
> >    trace data capture. Same region is used for trace data
> >    retention after a panic or watchdog reset.
> >
> >    TMC ETF: When available, use this reserved memory region for
> >    trace data retention synced from internal SRAM after a panic or
> >    watchdog reset.
> >
> > memory-region 1: Reserved meta data memory
> >
> >    TMC ETR, ETF: When available, use this memory for register
> >    snapshot retention synced from hardware registers after a panic
> >    or watchdog reset.
> 
> Instead of having to use a number to map the memory regions, could we use
> 
> memory-region-names property to describe the index ? That way it is much
> easier to read and is less error prone.
> 
> Names could be something like:
> 
> tmc-reserved-trace
> tmc-reserved-metadata
> 

Ack. Will use names in the next version. Will take care of the suggestions from Rob.

> Suzuki
> 
> >
> > Signed-off-by: Linu Cherian <lcherian@...vell.com>
> > ---
> >   .../devicetree/bindings/arm/arm,coresight-tmc.yaml  | 13
> +++++++++++++
> >   1 file changed, 13 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > index cb8dceaca70e..dce54978554a 100644
> > --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
> > @@ -101,6 +101,17 @@ properties:
> >             and ETF configurations.
> >           $ref: /schemas/graph.yaml#/properties/port
> >
> > +   memory-region:
> > +    items:
> > +      - description: Reserved trace buffer memory for ETR and ETF sinks.
> > +        For ETR, this reserved memory region is used for trace data capture.
> > +        Same region is used for trace data retention as well after a panic
> > +        or watchdog reset.
> > +        For ETF, this reserved memory region is used for retention of trace
> > +        data synced from internal SRAM after a panic or watchdog reset.
> > +
> > +      - description: Reserved meta data memory. Used for ETR and ETF sinks.
> > +
> >   required:
> >     - compatible
> >     - reg
> > @@ -115,6 +126,8 @@ examples:
> >       etr@...70000 {
> >           compatible = "arm,coresight-tmc", "arm,primecell";
> >           reg = <0x20070000 0x1000>;
> > +        memory-region = <&etr_trace_mem_reserved>,
> > +                       <&etr_mdata_mem_reserved>;
> >
> >           clocks = <&oscclk6a>;
> >           clock-names = "apb_pclk";