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Date:   Mon, 11 Sep 2023 12:26:29 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Jassi Brar <jassisinghbrar@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Sricharan Ramabadhran <quic_srichara@...cinc.com>,
        Anusha Rao <quic_anusha@...cinc.com>,
        Devi Priya <quic_devipriy@...cinc.com>,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH RESEND 6/7] clk: qcom: apss-ipq6018: add the GPLL0 clock
 also as clock provider

On 6.09.2023 06:56, Kathiravan Thirumoorthy wrote:
> While the kernel is booting up, APSS PLL will be running at 800MHz with
> GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be
> configured and select the rate based on the opp table and the source will
> be changed to APSS_PLL_EARLY.
> 
> Without this patch, CPU Freq driver reports that CPU is running at 24MHz
> instead of the 800MHz.
> 
> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad

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