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Message-ID: <ZP9ZjoFk1GV8gcW1@ghost>
Date:   Mon, 11 Sep 2023 11:16:46 -0700
From:   Charlie Jenkins <charlie@...osinc.com>
To:     David Laight <David.Laight@...lab.com>
Cc:     Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Samuel Holland <samuel.holland@...ive.com>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v2 1/5] riscv: Checksum header

On Sun, Sep 10, 2023 at 09:20:33PM +0000, David Laight wrote:
> ...
> > > > +/*
> > > > + *	Fold a partial checksum without adding pseudo headers
> > > > + */
> > > > +static inline __sum16 csum_fold(__wsum sum)
> > > > +{
> > > > +	sum += (sum >> 16) | (sum << 16);
> > > > +	return (__force __sum16)(~(sum >> 16));
> > > > +}
> 
> I'm intrigued, gcc normally compiler that quite well.
> The very similar (from arch/arc):
> 	return (~sum - rol32(sum, 16)) >> 16;
> is slightly better on most architectures.
> (Especially if the ~sum and rol() can be executed together.)
Oh wow that solves the problem of needing to zero extend the result
after taking the not. Taking the shift after the not both zero-extends
and places the result in the correct spot. It is a very interesting
property that it is possible to change the order of the operations if
the addition becomes a subtraction. I will make the change. Thank you!

- Charlie
> 
> The only odd archs I saw were sparc32 (carry flag bug no rotate)
> and arm (barrel shifter on all instructions).
> 
> It is better than the current asm for a lot of archs including x64.
> 
> 	David
> 
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
> Registration No: 1397386 (Wales)
> 

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