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Message-ID: <799325f5-29b5-f0c0-16ea-d47c06830ed3@collabora.com>
Date: Mon, 11 Sep 2023 12:59:52 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Chen-Yu Tsai <wenst@...omium.org>,
Mark Tseng <chun-jen.tseng@...iatek.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH] arm64: dts: mediatek: mt8186: change CCI OPP scaling
mapping
Il 11/09/23 11:47, Chen-Yu Tsai ha scritto:
> On Mon, Sep 11, 2023 at 4:09 PM Mark Tseng <chun-jen.tseng@...iatek.com> wrote:
>>
>> The original CCI OPP table minimum frequency 500Mhz is too low to cause
>> system stall, So it need update to new version, 1.4G ~ 1.05G.
>
> This doesn't read as you think it does. I suggest the following instead:
>
> The original CCI OPP table's lowest frequency 500 MHz is too low and causes
> system stalls. Increase the frequency range to 1.05 GHz ~ 1.4 GHz and adjust
> the OPPs accordingly.
>
>
> I also suggest making the subject more precise, like "Increase CCI frequency".
>
I agree with the commit title/description suggestion, but I wonder if it'd be
possible to solve this issue in another way, as this is going to increase the
heat output (even if only sensibly) and to also increase the power consumption
of the SoC.
I'm thinking about more aggressive scale-up and/or maybe interconnect votes.
Ideas?
Cheers,
Angelo
> ChenYu
>
>>
>> Fixes: 32dfbc03fc26 ("arm64: dts: mediatek: mt8186: Add CCI node and CCI OPP table")
>>
>> Signed-off-by: Mark Tseng <chun-jen.tseng@...iatek.com>
>> ---
>> arch/arm64/boot/dts/mediatek/mt8186.dtsi | 90 ++++++++++++------------
>> 1 file changed, 45 insertions(+), 45 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> index f04ae70c470a..b98832d032eb 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
>> @@ -39,79 +39,79 @@
>> compatible = "operating-points-v2";
>> opp-shared;
>>
>> - cci_opp_0: opp-500000000 {
>> - opp-hz = /bits/ 64 <500000000>;
>> - opp-microvolt = <600000>;
>> + cci_opp_0: opp-1050000000 {
>> + opp-hz = /bits/ 64 <1050000000>;
>> + opp-microvolt = <843750>;
>> };
>>
>> - cci_opp_1: opp-560000000 {
>> - opp-hz = /bits/ 64 <560000000>;
>> - opp-microvolt = <675000>;
>> + cci_opp_1: opp-1073000000 {
>> + opp-hz = /bits/ 64 <1073000000>;
>> + opp-microvolt = <850000>;
>> };
>>
>> - cci_opp_2: opp-612000000 {
>> - opp-hz = /bits/ 64 <612000000>;
>> - opp-microvolt = <693750>;
>> + cci_opp_2: opp-1096000000 {
>> + opp-hz = /bits/ 64 <1096000000>;
>> + opp-microvolt = <856250>;
>> };
>>
>> - cci_opp_3: opp-682000000 {
>> - opp-hz = /bits/ 64 <682000000>;
>> - opp-microvolt = <718750>;
>> + cci_opp_3: opp-1120000000 {
>> + opp-hz = /bits/ 64 <1120000000>;
>> + opp-microvolt = <862500>;
>> };
>>
>> - cci_opp_4: opp-752000000 {
>> - opp-hz = /bits/ 64 <752000000>;
>> - opp-microvolt = <743750>;
>> + cci_opp_4: opp-1143000000 {
>> + opp-hz = /bits/ 64 <1143000000>;
>> + opp-microvolt = <881250>;
>> };
>>
>> - cci_opp_5: opp-822000000 {
>> - opp-hz = /bits/ 64 <822000000>;
>> - opp-microvolt = <768750>;
>> + cci_opp_5: opp-1166000000 {
>> + opp-hz = /bits/ 64 <1166000000>;
>> + opp-microvolt = <893750>;
>> };
>>
>> - cci_opp_6: opp-875000000 {
>> - opp-hz = /bits/ 64 <875000000>;
>> - opp-microvolt = <781250>;
>> + cci_opp_6: opp-1190000000 {
>> + opp-hz = /bits/ 64 <1190000000>;
>> + opp-microvolt = <906250>;
>> };
>>
>> - cci_opp_7: opp-927000000 {
>> - opp-hz = /bits/ 64 <927000000>;
>> - opp-microvolt = <800000>;
>> + cci_opp_7: opp-1213000000 {
>> + opp-hz = /bits/ 64 <1213000000>;
>> + opp-microvolt = <918750>;
>> };
>>
>> - cci_opp_8: opp-980000000 {
>> - opp-hz = /bits/ 64 <980000000>;
>> - opp-microvolt = <818750>;
>> + cci_opp_8: opp-1236000000 {
>> + opp-hz = /bits/ 64 <1236000000>;
>> + opp-microvolt = <937500>;
>> };
>>
>> - cci_opp_9: opp-1050000000 {
>> - opp-hz = /bits/ 64 <1050000000>;
>> - opp-microvolt = <843750>;
>> + cci_opp_9: opp-1260000000 {
>> + opp-hz = /bits/ 64 <1260000000>;
>> + opp-microvolt = <950000>;
>> };
>>
>> - cci_opp_10: opp-1120000000 {
>> - opp-hz = /bits/ 64 <1120000000>;
>> - opp-microvolt = <862500>;
>> + cci_opp_10: opp-1283000000 {
>> + opp-hz = /bits/ 64 <1283000000>;
>> + opp-microvolt = <962500>;
>> };
>>
>> - cci_opp_11: opp-1155000000 {
>> - opp-hz = /bits/ 64 <1155000000>;
>> - opp-microvolt = <887500>;
>> + cci_opp_11: opp-1306000000 {
>> + opp-hz = /bits/ 64 <1306000000>;
>> + opp-microvolt = <975000>;
>> };
>>
>> - cci_opp_12: opp-1190000000 {
>> - opp-hz = /bits/ 64 <1190000000>;
>> - opp-microvolt = <906250>;
>> + cci_opp_12: opp-1330000000 {
>> + opp-hz = /bits/ 64 <1330000000>;
>> + opp-microvolt = <993750>;
>> };
>>
>> - cci_opp_13: opp-1260000000 {
>> - opp-hz = /bits/ 64 <1260000000>;
>> - opp-microvolt = <950000>;
>> + cci_opp_13: opp-1353000000 {
>> + opp-hz = /bits/ 64 <1353000000>;
>> + opp-microvolt = <1006250>;
>> };
>>
>> - cci_opp_14: opp-1330000000 {
>> - opp-hz = /bits/ 64 <1330000000>;
>> - opp-microvolt = <993750>;
>> + cci_opp_14: opp-1376000000 {
>> + opp-hz = /bits/ 64 <1376000000>;
>> + opp-microvolt = <1018750>;
>> };
>>
>> cci_opp_15: opp-1400000000 {
>> --
>> 2.18.0
>>
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