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Message-Id: <20230911132214.1776157-1-sharath.kumar.d.m@intel.com>
Date: Mon, 11 Sep 2023 18:52:12 +0530
From: sharath.kumar.d.m@...el.com
To: helgaas@...nel.org
Cc: lpieralisi@...nel.org, kw@...ux.com, robh@...nel.org,
bhelgaas@...gle.com, linux-pci@...r.kernel.org,
dinguyen@...nel.org, linux-kernel@...r.kernel.org,
D M Sharath Kumar <sharath.kumar.d.m@...el.com>
Subject: [PATCH v3 0/2] PCI: altera: add support to agilex family
From: D M Sharath Kumar <sharath.kumar.d.m@...el.com>
added new callback for
1) read,write to root port configuration registers
2) read,write to endpoint configuration registers
3) root port interrupt handler
agilex and newer platforms need to implemant the callback and generic root
port driver should work ( without much changes ) , legacy platforms (arria
and startix) implement configuration read,write directly in wrapper
api _altera_pcie_cfg_read/_altera_pcie_cfg_write
changelog v2:
saperated into two patches
1.refactored the driver for easily portability to future Altera FPGA
platforms
2.added support for "Agilex" FPGA
this driver supports PCI RP IP on Agilex FPGA, as these are FPGA its up
to the user to add PCI RP or not ( as per his needs). we are not adding
the device tree as part of this commit. we are expecting the add device
tree changes only if he is adding PCI RP IP in his design
changelog v3:
incorporate review comments from Bjorn Helgaas
D M Sharath Kumar (2):
PCI: altera: refactor driver for supporting new platforms
PCI: altera: add support for agilex family fpga
drivers/pci/controller/pcie-altera.c | 305 ++++++++++++++++++++++++---
1 file changed, 275 insertions(+), 30 deletions(-)
--
2.34.1
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