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Message-Id: <20230912131649.1491378-1-peng.fan@oss.nxp.com>
Date: Tue, 12 Sep 2023 21:16:46 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: abelvesa@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com
Cc: linux-imx@....com, linux-clk@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Jacky Bai <ping.bai@....com>, Peng Fan <peng.fan@....com>
Subject: [PATCH 1/4] clk: imx: Add 1039.5MHz frequency support for imx9 pll
From: Jacky Bai <ping.bai@....com>
For video pll, it may need to 1039.5MHz clock to fulfill
the LVDS display 148.5MHz * 7 requirement. So add 1039.5MHz
frequency config support for i.MX9 video PLL.
Signed-off-by: Jacky Bai <ping.bai@....com>
Acked-by: Peng Fan <peng.fan@....com>
Signed-off-by: Peng Fan <peng.fan@....com>
---
drivers/clk/imx/clk-fracn-gppll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 44462ab50e51..96105ee4d9ef 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -78,6 +78,7 @@ struct clk_fracn_gppll {
* The Fvco should be in range 2.5Ghz to 5Ghz
*/
static const struct imx_fracn_gppll_rate_table fracn_tbl[] = {
+ PLL_FRACN_GP(1039500000U, 173, 25, 100, 1, 4),
PLL_FRACN_GP(650000000U, 162, 50, 100, 0, 6),
PLL_FRACN_GP(594000000U, 198, 0, 1, 0, 8),
PLL_FRACN_GP(560000000U, 140, 0, 1, 0, 6),
--
2.37.1
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