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Message-ID: <CAJM55Z-_V6Ty61u1bF=BziBRwn7bzTygE02g_4B3UW9tG4yikw@mail.gmail.com>
Date: Tue, 12 Sep 2023 06:23:40 -0700
From: Emil Renner Berthing <emil.renner.berthing@...onical.com>
To: William Qiu <william.qiu@...rfivetech.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-mmc@...r.kernel.org
Cc: Emil Renner Berthing <kernel@...il.dk>,
Rob Herring <robh+dt@...nel.org>,
Jaehoon Chung <jh80.chung@...sung.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>
Subject: Re: [PATCH v2 3/3] riscv: dts: starfive: Drop unused properties and
limit frquency
William Qiu wrote:
> Drop unused properties and limit cclk_in to 50M, thus cancelling the
> internal frequency and adopting the by-pass mode.
That's two unrelated changes which should really be in different patches. But
again the hardware still has the relevant field in the syscon registers even if
the driver doesn't use it, so maybe just leave them and just keep this patch
adding the assigned-clock* properties.
/Emil
>
> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
> ---
> .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 --
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index d79f94432b27..d1f2ec308bca 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -205,6 +205,8 @@ &i2c6 {
>
> &mmc0 {
> max-frequency = <100000000>;
> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
> + assigned-clock-rates = <50000000>;
> bus-width = <8>;
> cap-mmc-highspeed;
> mmc-ddr-1_8v;
> @@ -221,6 +223,8 @@ &mmc0 {
>
> &mmc1 {
> max-frequency = <100000000>;
> + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
> + assigned-clock-rates = <50000000>;
> bus-width = <4>;
> no-sdio;
> no-mmc;
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index e85464c328d0..7b8e841aeef8 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -870,7 +870,6 @@ mmc0: mmc@...10000 {
> fifo-depth = <32>;
> fifo-watermark-aligned;
> data-addr = <0>;
> - starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
> status = "disabled";
> };
>
> @@ -886,7 +885,6 @@ mmc1: mmc@...20000 {
> fifo-depth = <32>;
> fifo-watermark-aligned;
> data-addr = <0>;
> - starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
> status = "disabled";
> };
>
> --
> 2.34.1
>
>
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