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Message-ID: <2a0657bf-2585-4b98-bbdb-dd38502c8555@csgroup.eu>
Date: Tue, 12 Sep 2023 15:06:27 +0000
From: Christophe Leroy <christophe.leroy@...roup.eu>
To: "paulmck@...nel.org" <paulmck@...nel.org>,
"Liam R. Howlett" <Liam.Howlett@...cle.com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Andrew Morton <akpm@...ux-foundation.org>,
"maple-tree@...ts.infradead.org" <maple-tree@...ts.infradead.org>,
"linux-mm@...ck.org" <linux-mm@...ck.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"stable@...r.kernel.org" <stable@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
Shanker Donthineni <sdonthineni@...dia.com>
Subject: Re: [PATCH v2 1/2] maple_tree: Disable mas_wr_append() when other
readers are possible
Le 12/09/2023 à 16:37, Christophe Leroy a écrit :
>
>
>>
>> Maybe something like this in __setup_irq(), right before the
>> mutex_lock()?
>>
>> WARN_ON_ONCE(irqs_disabled());
>>
>> This will dump the stack trace showing how __setup_irq() is being invoked
>> in early boot on ppc32.
>>
>> Again, given that __setup_irq() invokes mutex_lock(), invoking this
>> function in its current form before interrupts have been enabled is a
>> bad idea.
>>
>
> No trigger of that WARN_ON() I added in __setup_irq() as instructed
> above, still getting (pmac32_defconfig on MAC99 QEMU)
>
> ------------[ cut here ]------------
> Interrupts were enabled early
> WARNING: CPU: 0 PID: 0 at init/main.c:992 start_kernel+0x4d8/0x5c0
> Modules linked in:
> CPU: 0 PID: 0 Comm: swapper Not tainted 6.6.0-rc1-dirty #481
> Hardware name: PowerMac3,1 7400 0xc0209 PowerMac
> NIP: c0a6052c LR: c0a6052c CTR: 00000000
> REGS: c0c4dee0 TRAP: 0700 Not tainted (6.6.0-rc1-dirty)
> MSR: 00029032 <EE,ME,IR,DR,RI> CR: 24000282 XER: 20000000
>
> GPR00: c0a6052c c0c4dfa0 c0b92580 0000001d c0b9d128 00000001 c0b9d148
> 3ffffdff
> GPR08: c0ba80f0 00000000 00000000 3ffffe00 44000282 00000000 00000000
> 0199abfc
> GPR16: 0199b0a4 7fde7fa4 7fc5ac0c 000000bb 41000000 01c690c8 c0b92014
> c09b4bdc
> GPR24: c0c55220 c0ac0000 00000000 efff9109 efff9100 0000000a c0c6d000
> c0b920a0
> NIP [c0a6052c] start_kernel+0x4d8/0x5c0
> LR [c0a6052c] start_kernel+0x4d8/0x5c0
> Call Trace:
> [c0c4dfa0] [c0a6052c] start_kernel+0x4d8/0x5c0 (unreliable)
> [c0c4dff0] [00003540] 0x3540
> Code: 480037b1 48023c05 4bab88ed 90620260 480139e9 4b657ced 7d2000a6
> 71298000 41a20014 3c60c09a 3863b78c 4b5e9ccd <0fe00000> 39200000
> 99380008 7d2000a6
> ---[ end trace 0000000000000000 ]---
>
For what it's worth, the interrupts seems to be enabled by the call to
init_IRQ().
Diging into it that's enabled by the call to __vmalloc_node() in
alloc_vm_stack()
static void *__init alloc_vm_stack(void)
{
return __vmalloc_node(THREAD_SIZE, THREAD_ALIGN, THREADINFO_GFP,
NUMA_NO_NODE, (void *)_RET_IP_);
}
static void __init vmap_irqstack_init(void)
{
int i;
for_each_possible_cpu(i) {
softirq_ctx[i] = alloc_vm_stack();
hardirq_ctx[i] = alloc_vm_stack();
}
}
void __init init_IRQ(void)
{
if (IS_ENABLED(CONFIG_VMAP_STACK))
vmap_irqstack_init();
if (ppc_md.init_IRQ)
ppc_md.init_IRQ();
if (!WARN_ON(!ppc_md.get_irq))
static_call_update(ppc_get_irq, ppc_md.get_irq);
}
Christophe
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