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Message-ID: <a9b646c7-2c02-8a69-a4c8-7e981a630eef@wanadoo.fr>
Date: Tue, 12 Sep 2023 19:15:54 +0200
From: Christophe JAILLET <christophe.jaillet@...adoo.fr>
To: Andreas Kemnade <andreas@...nade.info>, dmitry.torokhov@...il.com,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, lee@...nel.org, bcousson@...libre.com,
tony@...mide.com, mturquette@...libre.com, sboyd@...nel.org,
linux-input@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH v3 4/5] clk: twl: add clock driver for TWL6032
Le 12/09/2023 à 00:13, Andreas Kemnade a écrit :
> The TWL6032 has some clock outputs which are controlled like
> fixed-voltage regulators, in some drivers for these chips
> found in the wild, just the regulator api is abused for controlling
> them, so simply use something similar to the regulator functions.
> Due to a lack of hardware available for testing, leave out the
> TWL6030-specific part of those functions.
>
> Signed-off-by: Andreas Kemnade <andreas@...nade.info>
> ---
> drivers/clk/Kconfig | 9 ++
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-twl.c | 197 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 207 insertions(+)
> create mode 100644 drivers/clk/clk-twl.c
>
...
> +static int twl_clks_probe(struct platform_device *pdev)
> +{
> + struct clk_hw_onecell_data *clk_data;
> + const struct twl_clks_data *hw_data;
> +
> + struct twl_clock_info *cinfo;
> + int ret;
> + int i;
> + int count;
> +
> + hw_data = twl6032_clks;
> + for (count = 0; hw_data[count].init.name; count++)
> + ;
Nit: does removing the /* sentinel */ and using
ARRAY_SIZE(twl_clks_data) would make sense and be simpler?
CJ
> +
> + clk_data = devm_kzalloc(&pdev->dev,
> + struct_size(clk_data, hws, count),
> + GFP_KERNEL);
> + if (!clk_data)
> + return -ENOMEM;
> +
> + clk_data->num = count;
> + cinfo = devm_kcalloc(&pdev->dev, count, sizeof(*cinfo), GFP_KERNEL);
> + if (!cinfo)
> + return -ENOMEM;
> +
> + for (i = 0; i < count; i++) {
> + cinfo[i].base = hw_data[i].base;
> + cinfo[i].dev = &pdev->dev;
> + cinfo[i].hw.init = &hw_data[i].init;
> + ret = devm_clk_hw_register(&pdev->dev, &cinfo[i].hw);
> + if (ret) {
> + dev_err(&pdev->dev, "Fail to register clock %s, %d\n",
> + hw_data[i].init.name, ret);
> + return ret;
> + }
> + clk_data->hws[i] = &cinfo[i].hw;
> + }
> +
> + ret = devm_of_clk_add_hw_provider(&pdev->dev,
> + of_clk_hw_onecell_get, clk_data);
> + if (ret < 0)
> + dev_err(&pdev->dev, "Fail to add clock driver, %d\n", ret);
> +
> + return ret;
Nit: should there be a V4, some prefer return 0 to be more explicit.
> +}
...
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