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Message-ID: <9d0cb447-2556-4609-a96f-13875ddeeda3@roeck-us.net>
Date: Tue, 12 Sep 2023 13:31:23 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: Helge Deller <deller@....de>
Cc: Huacai Chen <chenhuacai@...nel.org>,
WANG Xuerui <kernel@...0n.name>, loongarch@...ts.linux.dev,
Linus Torvalds <torvalds@...ux-foundation.org>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] LoongArch: Fix lockdep static memory detection
On Tue, Sep 12, 2023 at 09:18:37PM +0200, Helge Deller wrote:
> Since commit 0a6b58c5cd0d ("lockdep: fix static memory detection even
> more") the lockdep code uses is_kernel_core_data(), is_kernel_rodata()
> and init_section_contains() to verify if a lock is located inside a
> kernel static data section.
>
> This change triggers a failure on LoongArch, for which the vmlinux.lds.S
> script misses to put the locks (as part of in the .data.rel symbols)
> into the Linux data section.
> This patch fixes the lockdep problem by moving *(.data.rel*) symbols
> into the kernel data section (from _sdata to _edata).
>
> Additionally, move other wrongly assigned symbols too:
> - altinstructions into the _initdata section,
> - PLT symbols behind the read-only section, and
> - *(.la_abs) into the data section.
>
> Signed-off-by: Helge Deller <deller@....de>
> Reported-by: Guenter Roeck <linux@...ck-us.net>
> Fixes: 0a6b58c5cd0d ("lockdep: fix static memory detection even more")
> Cc: stable <stable@...nel.org> # v6.4+
Tested-by: Guenter Roeck <linux@...ck-us.net>
>
> diff --git a/arch/loongarch/kernel/vmlinux.lds.S b/arch/loongarch/kernel/vmlinux.lds.S
> index b1686afcf876..bb2ec86f37a8 100644
> --- a/arch/loongarch/kernel/vmlinux.lds.S
> +++ b/arch/loongarch/kernel/vmlinux.lds.S
> @@ -53,33 +53,6 @@ SECTIONS
> . = ALIGN(PECOFF_SEGMENT_ALIGN);
> _etext = .;
>
> - /*
> - * struct alt_inst entries. From the header (alternative.h):
> - * "Alternative instructions for different CPU types or capabilities"
> - * Think locking instructions on spinlocks.
> - */
> - . = ALIGN(4);
> - .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
> - __alt_instructions = .;
> - *(.altinstructions)
> - __alt_instructions_end = .;
> - }
> -
> -#ifdef CONFIG_RELOCATABLE
> - . = ALIGN(8);
> - .la_abs : AT(ADDR(.la_abs) - LOAD_OFFSET) {
> - __la_abs_begin = .;
> - *(.la_abs)
> - __la_abs_end = .;
> - }
> -#endif
> -
> - .got : ALIGN(16) { *(.got) }
> - .plt : ALIGN(16) { *(.plt) }
> - .got.plt : ALIGN(16) { *(.got.plt) }
> -
> - .data.rel : { *(.data.rel*) }
> -
> . = ALIGN(PECOFF_SEGMENT_ALIGN);
> __init_begin = .;
> __inittext_begin = .;
> @@ -94,6 +67,18 @@ SECTIONS
>
> __initdata_begin = .;
>
> + /*
> + * struct alt_inst entries. From the header (alternative.h):
> + * "Alternative instructions for different CPU types or capabilities"
> + * Think locking instructions on spinlocks.
> + */
> + . = ALIGN(4);
> + .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
> + __alt_instructions = .;
> + *(.altinstructions)
> + __alt_instructions_end = .;
> + }
> +
> INIT_DATA_SECTION(16)
> .exit.data : {
> EXIT_DATA
> @@ -113,6 +98,11 @@ SECTIONS
>
> _sdata = .;
> RO_DATA(4096)
> +
> + .got : ALIGN(16) { *(.got) }
> + .plt : ALIGN(16) { *(.plt) }
> + .got.plt : ALIGN(16) { *(.got.plt) }
> +
> RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PAGE_SIZE, THREAD_SIZE)
>
> .rela.dyn : ALIGN(8) {
> @@ -121,6 +111,17 @@ SECTIONS
> __rela_dyn_end = .;
> }
>
> + .data.rel : { *(.data.rel*) }
> +
> +#ifdef CONFIG_RELOCATABLE
> + . = ALIGN(8);
> + .la_abs : AT(ADDR(.la_abs) - LOAD_OFFSET) {
> + __la_abs_begin = .;
> + *(.la_abs)
> + __la_abs_end = .;
> + }
> +#endif
> +
> .sdata : {
> *(.sdata)
> }
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