[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230911221346.1484543-6-andreas@kemnade.info>
Date: Tue, 12 Sep 2023 00:13:46 +0200
From: Andreas Kemnade <andreas@...nade.info>
To: dmitry.torokhov@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
lee@...nel.org, bcousson@...libre.com, tony@...mide.com,
mturquette@...libre.com, sboyd@...nel.org, andreas@...nade.info,
linux-input@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: [PATCH v3 5/5] ARM: dts: omap4-embt2ws: enable 32K clock on WLAN
WLAN did only work if clock was left enabled by the original system,
so make it fully enable the needed resources itself.
Signed-off-by: Andreas Kemnade <andreas@...nade.info>
---
arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
index ee86981b2e448..9d2f2d8639496 100644
--- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
+++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
@@ -69,6 +69,12 @@ unknown_supply: unknown-supply {
regulator-name = "unknown";
};
+ wl12xx_pwrseq: wl12xx-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&twl 1>;
+ clock-names = "ext_clock";
+ };
+
/* regulator for wl12xx on sdio2 */
wl12xx_vmmc: wl12xx-vmmc {
pinctrl-names = "default";
@@ -92,6 +98,7 @@ &i2c1 {
twl: pmic@48 {
compatible = "ti,twl6032";
reg = <0x48>;
+ #clock-cells = <1>;
/* IRQ# = 7 */
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
interrupt-controller;
@@ -316,6 +323,7 @@ &mmc3 {
pinctrl-names = "default";
pinctrl-0 = <&wl12xx_pins>;
vmmc-supply = <&wl12xx_vmmc>;
+ mmc-pwrseq = <&wl12xx_pwrseq>;
interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0x12e>;
non-removable;
--
2.39.2
Powered by blists - more mailing lists