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Message-ID: <567f066c59de49e88dec4bae459d1dcc@realtek.com>
Date:   Tue, 12 Sep 2023 02:48:14 +0000
From:   Stanley Chang[昌育德] 
        <stanley_chang@...ltek.com>
To:     Thinh Nguyen <Thinh.Nguyen@...opsys.com>
CC:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Felipe Balbi <balbi@...nel.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 RESEND 1/2] usb: dwc3: core: configure TX/RX threshold for DWC3_IP

Hi Thinh,

> >
> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index
> > 9c6bf054f15d..1f74a53816c3 100644
> > --- a/drivers/usb/dwc3/core.c
> > +++ b/drivers/usb/dwc3/core.c
> > @@ -1246,6 +1246,39 @@ static int dwc3_core_init(struct dwc3 *dwc)
> >               }
> >       }
> >
> > +     if (DWC3_IP_IS(DWC3)) {
> 
> Would you mind also add the checks for DWC_usb31 and DWC_usb32? Both
> the
> DWC_usb31 and DWC_usb32 share the same field offsets within
> GTX/RXTHRCFG registers. The macros are already defined for those IPs.

DWC3 and DWC31, DWC32 seem to have different register definition as follows.
/* Global RX Threshold Configuration Register */
#define DWC3_GRXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0x1f) << 19)
#define DWC3_GRXTHRCFG_RXPKTCNT(n) (((n) & 0xf) << 24)
#define DWC3_GRXTHRCFG_PKTCNTSEL BIT(29)

/* Global TX Threshold Configuration Register */
#define DWC3_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0xff) << 16)
#define DWC3_GTXTHRCFG_TXPKTCNT(n) (((n) & 0xf) << 24)
#define DWC3_GTXTHRCFG_PKTCNTSEL BIT(29)

/* Global RX Threshold Configuration Register for DWC_usb31 only */
#define DWC31_GRXTHRCFG_MAXRXBURSTSIZE(n)       (((n) & 0x1f) << 16)
#define DWC31_GRXTHRCFG_RXPKTCNT(n)             (((n) & 0x1f) << 21)
#define DWC31_GRXTHRCFG_PKTCNTSEL               BIT(26)
#define DWC31_RXTHRNUMPKTSEL_HS_PRD             BIT(15)
#define DWC31_RXTHRNUMPKT_HS_PRD(n)             (((n) & 0x3) << 13)
#define DWC31_RXTHRNUMPKTSEL_PRD                BIT(10)
#define DWC31_RXTHRNUMPKT_PRD(n)                (((n) & 0x1f) << 5)
#define DWC31_MAXRXBURSTSIZE_PRD(n)             ((n) & 0x1f)

/* Global TX Threshold Configuration Register for DWC_usb31 only */
#define DWC31_GTXTHRCFG_MAXTXBURSTSIZE(n)       (((n) & 0x1f) << 16)
#define DWC31_GTXTHRCFG_TXPKTCNT(n)             (((n) & 0x1f) << 21)
#define DWC31_GTXTHRCFG_PKTCNTSEL               BIT(26)
#define DWC31_TXTHRNUMPKTSEL_HS_PRD             BIT(15)
#define DWC31_TXTHRNUMPKT_HS_PRD(n)             (((n) & 0x3) << 13)
#define DWC31_TXTHRNUMPKTSEL_PRD                BIT(10)
#define DWC31_TXTHRNUMPKT_PRD(n)                (((n) & 0x1f) << 5)
#define DWC31_MAXTXBURSTSIZE_PRD(n)             ((n) & 0x1f)

> Also, I think this new addition will make dwc3_core_init() lengthy. Can we split
> this logic to a separate function, perhaps dwc3_config_threshold()?
> 

Ok, I will move this logic to a new function.
Thanks,
Stanley

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