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Message-Id: <20230912045157.177966-30-claudiu.beznea.uj@bp.renesas.com>
Date: Tue, 12 Sep 2023 07:51:49 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: geert+renesas@...der.be, mturquette@...libre.com, sboyd@...nel.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, ulf.hansson@...aro.org,
linus.walleij@...aro.org, gregkh@...uxfoundation.org,
jirislaby@...nel.org, magnus.damm@...il.com,
catalin.marinas@....com, will@...nel.org,
prabhakar.mahadev-lad.rj@...renesas.com,
biju.das.jz@...renesas.com, quic_bjorande@...cinc.com,
arnd@...db.de, konrad.dybcio@...aro.org, neil.armstrong@...aro.org,
nfraprado@...labora.com, rafal@...ecki.pl,
wsa+renesas@...g-engineering.com
Cc: linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-serial@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: [PATCH 29/37] dt-bindings: pinctrl: renesas: document RZ/G3S SoC
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Add documentation for pin controller found on RZ/G3S (R9A08G045) SoC.
Compared with RZ/G2{L,UL} RZ/G3S has 82 general-purpose IOs, no slew
rate and output impedance support and more values for drive strength
which needs to be expressed in microamp.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
.../pinctrl/renesas,rzg2l-pinctrl.yaml | 26 +++++++++++++++----
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
index 145c5442f268..079e5be69330 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
@@ -25,6 +25,7 @@ properties:
- enum:
- renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
+ - renesas,r9a08g045-pinctrl # RZ/G3S
- items:
- enum:
@@ -77,6 +78,26 @@ additionalProperties:
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,r9a08g045-pinctrl
+ then:
+ properties:
+ drive-strength-microamp:
+ enum: [ 1900, 2200, 4000, 4400, 4500, 4700, 5200, 5300, 5700,
+ 5800, 6000, 6050, 6100, 6550, 6800, 7000, 8000, 9000,
+ 10000 ]
+ else:
+ properties:
+ drive-strength:
+ enum: [ 2, 4, 8, 12 ]
+ output-impedance-ohms:
+ enum: [ 33, 50, 66, 100 ]
+ slew-rate: true
+
description:
Pin controller client devices use pin configuration subnodes (children
and grandchildren) for desired pin configuration.
@@ -89,14 +110,9 @@ additionalProperties:
alternate function configuration number using the RZG2L_PORT_PINMUX()
helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h>.
pins: true
- drive-strength:
- enum: [ 2, 4, 8, 12 ]
- output-impedance-ohms:
- enum: [ 33, 50, 66, 100 ]
power-source:
description: I/O voltage in millivolt.
enum: [ 1800, 2500, 3300 ]
- slew-rate: true
gpio-hog: true
gpios: true
input-enable: true
--
2.39.2
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