linux-kernel - Re: [PATCH v2] drm/mediatek: dsi: Add mode

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Message-ID: <2404434f5fd2975ef3e4a4873a57051cb174ddfa.camel@mediatek.com>
Date:   Tue, 12 Sep 2023 06:57:45 +0000
From:   Shuijing Li (李水静) 
        <Shuijing.Li@...iatek.com>
To:     "p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
        "airlied@...il.com" <airlied@...il.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "daniel@...ll.ch" <daniel@...ll.ch>,
        "chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>
CC:     "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Jitao Shi (石记涛) <jitao.shi@...iatek.com>
Subject: Re: [PATCH v2] drm/mediatek: dsi: Add mode_valid callback to DSI
 bridge

Hi CK,

Gentle ping for this patch, if there is anything I need to modify,
please kindly let me know.

Thanks.


On Wed, 2023-08-23 at 17:20 +0800, Shuijing Li wrote:
> Support IGT (Intel GPU Tools) in Mediatek DSI driver.
> According to the description of MIPI Alliance Specification for D-
> PHY 
> Version 1.1, the maximum supported data rate is 1.5Gbps, so add
> mode_valid
> callback to dsi bridge to filter out the data rate exceeding the
> Specification.
> 
> Signed-off-by: Shuijing Li <shuijing.li@...iatek.com>
> ---
> Changes in v2:
> Correct descriptions of title and commit message.
> ---
>  drivers/gpu/drm/mediatek/mtk_dsi.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
> b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 7d5250351193..a494e04f0ddf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -806,6 +806,25 @@ static void
> mtk_dsi_bridge_atomic_post_disable(struct drm_bridge *bridge,
>  	mtk_dsi_poweroff(dsi);
>  }
>  
> +static enum drm_mode_status
> +mtk_dsi_bridge_mode_valid(struct drm_bridge *bridge,
> +			  const struct drm_display_info *info,
> +			  const struct drm_display_mode *mode)
> +{
> +	struct mtk_dsi *dsi = bridge_to_dsi(bridge);
> +	u32 bpp;
> +
> +	if (dsi->format == MIPI_DSI_FMT_RGB565)
> +		bpp = 16;
> +	else
> +		bpp = 24;
> +
> +	if (mode->clock * bpp / dsi->lanes > 1500000)
> +		return MODE_CLOCK_HIGH;
> +
> +	return MODE_OK;
> +}
> +
>  static const struct drm_bridge_funcs mtk_dsi_bridge_funcs = {
>  	.attach = mtk_dsi_bridge_attach,
>  	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
> @@ -815,6 +834,7 @@ static const struct drm_bridge_funcs
> mtk_dsi_bridge_funcs = {
>  	.atomic_pre_enable = mtk_dsi_bridge_atomic_pre_enable,
>  	.atomic_post_disable = mtk_dsi_bridge_atomic_post_disable,
>  	.atomic_reset = drm_atomic_helper_bridge_reset,
> +	.mode_valid = mtk_dsi_bridge_mode_valid,
>  	.mode_set = mtk_dsi_bridge_mode_set,
>  };
>