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Message-ID: <ee81ff75-c6db-9a1a-2bca-f509ab4499d8@linaro.org>
Date: Tue, 12 Sep 2023 09:05:46 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: k.son@...sung.com, p.zabel@...gutronix.de, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
jszhang@...nel.org, guoren@...nel.org, wefu@...hat.com,
paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, inki.dae@...sung.com
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 3/3] riscv: dts: Add th1520 reset device tree
On 12/09/2023 04:49, k.son@...sung.com wrote:
> From: Kwanghoon Son <k.son@...sung.com>
>
> Add reset device tree for th1520 SoC
>
> Signed-off-by: Kwanghoon Son <k.son@...sung.com>
> ---
> arch/riscv/boot/dts/thead/th1520.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ce708183b6f6..7e592449b5e4 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -5,6 +5,7 @@
> */
>
> #include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/reset/th1520-reset.h>
>
> / {
> compatible = "thead,th1520";
> @@ -418,5 +419,12 @@ portf: gpio-controller@0 {
> interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
> };
> };
> +
> + rst: reset-controller@...f014000 {
> + compatible = "thead,th1520-reset", "syscon";
> + reg = <0xff 0xef014000 0x0 0x1000>;
> + #reset-cells = <1>;
> + status = "okay";
Drop, it's by default. Look at the other nodes - they do not have it, so
neither this node should.
Best regards,
Krzysztof
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