linux-kernel - Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: enable the inline crypto engine

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Message-ID: <e4a40052-8e16-449a-92c0-f7c822aa49ad@linaro.org>
Date:   Wed, 13 Sep 2023 20:05:16 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        "David S . Miller" <davem@...emloft.net>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-crypto@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sa8775p: enable the inline crypto
 engine

On 13.09.2023 17:35, Bartosz Golaszewski wrote:
> Add an ICE node to sa8775p SoC description and enable it by adding a
> phandle to the UFS node.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> ---
I don't have any sources backing this up, but 8350 seems to
have the exact same register ranges for this block, so I'm
inclined to believe it's ok

Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>

Konrad