linux-kernel - Re: [PATCH] drm/msm/adreno: Add support for SM7150 SoC machine

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <7671aa93-3967-45c0-bf09-a2d63a99ced6@linaro.org>
Date:   Wed, 13 Sep 2023 21:23:51 +0200
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     Danila Tikhonov <danila@...xyga.com>, robdclark@...il.com,
        quic_abhinavk@...cinc.com, dmitry.baryshkov@...aro.org,
        sean@...rly.run, marijn.suijten@...ainline.org, airlied@...il.com,
        daniel@...ll.ch, johan+linaro@...nel.org, andersson@...nel.org
Cc:     linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/msm/adreno: Add support for SM7150 SoC machine

On 13.09.2023 21:19, Danila Tikhonov wrote:
> SM7150 has 5 power levels which correspond to 5 speed-bin values: 0,
> 128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up
> to zero decimal places.
> 
> The vendor's FW GMU is called a618_gmu.bin. And also a618 on SM7150 uses
> a615 zapfw.
Interesting.

GMU fw comes from Qualcomm and should not(?) have any
vendor modifications, btw.

Can you try loading the upstream a630_gmu.bin or a619_gmu.bin
from linux-firmware and seeing if anything changes?

> +	}, {
> +		.machine = "qcom,sm7150",
> +		.chip_ids = ADRENO_CHIP_IDS(0x06010800),
> +		.family = ADRENO_6XX_GEN1,
> +		.revn = 618,
I'm not sure what Rob's stance on using revn is for values
that have already been used before..

Konrad
> +		.fw = {
> +			[ADRENO_FW_SQE] = "a630_sqe.fw",
> +			[ADRENO_FW_GMU] = "a618_gmu.bin",
> +		},
> +		.gmem = SZ_512K,
> +		.inactive_period = DRM_MSM_INACTIVE_PERIOD,
> +		.quirks = ADRENO_QUIRK_HAS_CACHED_COHERENT,
> +		.init = a6xx_gpu_init,
> +		.zapfw = "a615_zap.mdt",
.mbn?

> +		.hwcg = a615_hwcg,
> +		.speedbins = ADRENO_SPEEDBINS(
> +			{ 0,   0 },
> +			{ 128, 1 },
> +			{ 146, 2 },
> +			{ 167, 3 },
> +			{ 172, 4 },
> +		),
>  	}, {
>  		.chip_ids = ADRENO_CHIP_IDS(0x06010800),
>  		.family = ADRENO_6XX_GEN1,
> @@ -507,6 +529,10 @@ MODULE_FIRMWARE("qcom/a530_zap.b00");
>  MODULE_FIRMWARE("qcom/a530_zap.b01");
>  MODULE_FIRMWARE("qcom/a530_zap.b02");
>  MODULE_FIRMWARE("qcom/a540_gpmu.fw2");
> +MODULE_FIRMWARE("qcom/a615_zap.mbt");
> +MODULE_FIRMWARE("qcom/a615_zap.b00");
> +MODULE_FIRMWARE("qcom/a615_zap.b01");
> +MODULE_FIRMWARE("qcom/a615_zap.b02");
and here too?

Konrad