linux-kernel - Re: [EXTERNAL] Re: [PATCH net-next v2 1/2] dt-bindings: net: Add documentation for Half duplex support.

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Date:   Wed, 13 Sep 2023 11:47:50 +0530
From:   MD Danish Anwar <danishanwar@...com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     Rob Herring <robh@...nel.org>, Roger Quadros <rogerq@...com>,
        Conor Dooley <conor+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        "David S. Miller" <davem@...emloft.net>,
        Vignesh Raghavendra <vigneshr@...com>,
        Simon Horman <horms@...nel.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <netdev@...r.kernel.org>, <srk@...com>, <r-gunasekaran@...com>,
        Roger Quadros <rogerq@...nel.org>
Subject: Re: [EXTERNAL] Re: [PATCH net-next v2 1/2] dt-bindings: net: Add
 documentation for Half duplex support.

On 12/09/23 20:46, Andrew Lunn wrote:
>> Sure Rob, I will change the description to below.
>>
>>     description:
>>       Indicates that the PHY output pin (COL) is routed to ICSSG GPIO
> 
> The PHY has multiple output pins, so i would not put COL in brackets,
> but make it explicit which pin you are referring to.
> 

Sure, I will remove the brackets and make it explicit.

>>       pin (PRGx_PRU0/1_GPIO10) as input and ICSSG MII port is capable
>>       of half duplex operations.
> 
> "input and so the ICSSG MII port is"
> 

I think "input so that the ICSSG MII port is" will be better.

The description would look something like below,

  description:
    Indicates that the PHY output pin COL is routed to ICSSG GPIO pin
    (PRGx_PRU0/1_GPIO10) as input so that the ICSSG MII port is
    capable of half duplex operations.

I will post the next version with this change.

>        Andrew

-- 
Thanks and Regards,
Danish