linux-kernel - [PATCH v2 1/1] PCI: mediatek: Correct type for virt_to

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Message-Id: <20230914192324.672997-1-andriy.shevchenko@linux.intel.com>
Date:   Thu, 14 Sep 2023 22:23:24 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     linux-pci@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc:     Ryder Lee <ryder.lee@...iatek.com>,
        Jianjun Wang <jianjun.wang@...iatek.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Huacai Chen <chenhuacai@...nel.org>,
        kernel test robot <lkp@...el.com>
Subject: [PATCH v2 1/1] PCI: mediatek: Correct type for virt_to_phys()

virt_to_phys() takes a regular pointer, while driver supplies __iomem
annotated one. Force type to void to make sparse happy, otherwise

   pcie-mediatek.c:400:40: sparse:     expected void volatile *address
   pcie-mediatek.c:400:40: sparse:     got void [noderef] __iomem *

   pcie-mediatek.c:523:44: sparse:     expected void volatile *address
   pcie-mediatek.c:523:44: sparse:     got void [noderef] __iomem *

Reported-by: Huacai Chen <chenhuacai@...nel.org>
Reported-by: kernel test robot <lkp@...el.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202309072237.9zxMv4MZ-lkp@intel.com/
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
 drivers/pci/controller/pcie-mediatek.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index 66a8f73296fc..5e795afd1cee 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -397,7 +397,7 @@ static void mtk_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
 	phys_addr_t addr;
 
 	/* MT2712/MT7622 only support 32-bit MSI addresses */
-	addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
+	addr = virt_to_phys((__force void *)port->base + PCIE_MSI_VECTOR);
 	msg->address_hi = 0;
 	msg->address_lo = lower_32_bits(addr);
 
@@ -520,7 +520,7 @@ static void mtk_pcie_enable_msi(struct mtk_pcie_port *port)
 	u32 val;
 	phys_addr_t msg_addr;
 
-	msg_addr = virt_to_phys(port->base + PCIE_MSI_VECTOR);
+	msg_addr = virt_to_phys((__force void *)port->base + PCIE_MSI_VECTOR);
 	val = lower_32_bits(msg_addr);
 	writel(val, port->base + PCIE_IMSI_ADDR);
 
-- 
2.40.0.1.gaa8946217a0b