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Message-ID: <CAMuHMdWDa0pmCR3Ma3KWhRTyXk13qXt0wsu50M9CRhNn5SSJ0A@mail.gmail.com>
Date: Thu, 14 Sep 2023 15:06:34 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
ulf.hansson@...aro.org, linus.walleij@...aro.org,
gregkh@...uxfoundation.org, jirislaby@...nel.org,
magnus.damm@...il.com, catalin.marinas@....com, will@...nel.org,
prabhakar.mahadev-lad.rj@...renesas.com,
biju.das.jz@...renesas.com, quic_bjorande@...cinc.com,
arnd@...db.de, konrad.dybcio@...aro.org, neil.armstrong@...aro.org,
nfraprado@...labora.com, rafal@...ecki.pl,
wsa+renesas@...g-engineering.com,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-serial@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 11/37] clk: renesas: rzg2l: simplify a bit the logic in rzg2l_mod_clock_endisable()
On Tue, Sep 12, 2023 at 6:52 AM Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> The bitmask << 16 is anyway set on both branches of if thus move it
> before the if and set the lower bits of registers only in case clock is
> enabled.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-clk-for-v6.7.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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