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Message-ID: <20230915150332.GA3719864-robh@kernel.org>
Date: Fri, 15 Sep 2023 10:03:32 -0500
From: Rob Herring <robh@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: Wang Chen <unicornxw@...il.com>, linux-riscv@...ts.infradead.org,
aou@...s.berkeley.edu, krzysztof.kozlowski+dt@...aro.org,
palmer@...belt.com, paul.walmsley@...ive.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
jszhang@...nel.org, guoren@...nel.org, chao.wei@...hgo.com,
xiaoguang.xing@...hgo.com, Wang Chen <wangchen20@...as.ac.cn>
Subject: Re: [PATCH 04/12] dt-bindings: riscv: Add T-HEAD C920 compatibles
On Fri, Sep 15, 2023 at 03:11:43PM +0100, Conor Dooley wrote:
> On Fri, Sep 15, 2023 at 03:23:33PM +0800, Wang Chen wrote:
> > The C920 is RISC-V CPU cores from T-HEAD Semiconductor.
> > Notably, the C920 core is used in the SOPHGO SG2042 SoC.
> >
> > Signed-off-by: Wang Chen <wangchen20@...as.ac.cn>
> > Signed-off-by: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
>
> I figure this is missing a From: or Co-developed-by line.
From: (author) as 2 authors for 1 line change is questionable.
The sender's email should be the last S-o-b. So like this:
From: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
...
Signed-off-by: Xiaoguang Xing <xiaoguang.xing@...hgo.com>
Signed-off-by: Wang Chen <wangchen20@...as.ac.cn>
>
> > ---
> > Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > index 38c0b5213736..185a0191bad6 100644
> > --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
> > @@ -47,6 +47,7 @@ properties:
> > - sifive,u74-mc
> > - thead,c906
> > - thead,c910
> > + - thead,c920
> > - const: riscv
> > - items:
> > - enum:
> > --
> > 2.25.1
> >
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