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Date:   Fri, 15 Sep 2023 15:10:05 +0800
From:   Wang Chen <unicornxw@...il.com>
To:     linux-riscv@...ts.infradead.org, conor@...nel.org,
        aou@...s.berkeley.edu, krzysztof.kozlowski+dt@...aro.org,
        palmer@...belt.com, paul.walmsley@...ive.com, robh+dt@...nel.org
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        jszhang@...nel.org, guoren@...nel.org, chao.wei@...hgo.com,
        xiaoguang.xing@...hgo.com, Wang Chen <wangchen20@...as.ac.cn>
Subject: [PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support

From: "xiaoguang.xing" <xiaoguang.xing@...hgo.com>

The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
cores.

Signed-off-by: xiaoguang.xing <xiaoguang.xing@...hgo.com>
Signed-off-by: Wang Chen <wangchen20@...as.ac.cn>
---
 arch/riscv/Kconfig.socs | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 6833d01e2e70..fc7b5e6c7def 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -110,4 +110,14 @@ config SOC_CANAAN_K210_DTB_SOURCE
 
 endif # ARCH_CANAAN
 
+config ARCH_SOPHGO
+	bool "Sophgo SoCs"
+	select SIFIVE_PLIC
+	help
+	  This enables support for Sophgo SoC platform hardware.
+	  SOPHGO is committed to become a provider of universal
+	  computing power, focusing on the development and
+	  promotion of computing power products such as AI and
+	  RISC-V CPU.
+
 endmenu # "SoC selection"
-- 
2.25.1

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