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Message-ID: <20230915-groovy-fragile-8c3a3a7b038e@wendy>
Date: Fri, 15 Sep 2023 08:21:19 +0100
From: Conor Dooley <conor.dooley@...rochip.com>
To: Wang Chen <unicornxw@...il.com>
CC: <linux-riscv@...ts.infradead.org>, <conor@...nel.org>,
<aou@...s.berkeley.edu>, <krzysztof.kozlowski+dt@...aro.org>,
<palmer@...belt.com>, <paul.walmsley@...ive.com>,
<robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <jszhang@...nel.org>,
<guoren@...nel.org>, <chao.wei@...hgo.com>,
<xiaoguang.xing@...hgo.com>, Wang Chen <wangchen20@...as.ac.cn>
Subject: Re: [PATCH 01/12] riscv: Add SOPHGO SOC family Kconfig support
Yo,
On Fri, Sep 15, 2023 at 03:10:05PM +0800, Wang Chen wrote:
> From: "xiaoguang.xing" <xiaoguang.xing@...hgo.com>
This needs to be a name, not the contents of their email address.
Probably just needs the . swapped for a space?
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
>
> Signed-off-by: xiaoguang.xing <xiaoguang.xing@...hgo.com>
> Signed-off-by: Wang Chen <wangchen20@...as.ac.cn>
> ---
> arch/riscv/Kconfig.socs | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..fc7b5e6c7def 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -110,4 +110,14 @@ config SOC_CANAAN_K210_DTB_SOURCE
>
> endif # ARCH_CANAAN
>
> +config ARCH_SOPHGO
> + bool "Sophgo SoCs"
> + select SIFIVE_PLIC
This should not be needed, this should be selected at the arch level.
> + help
> + This enables support for Sophgo SoC platform hardware.
> + SOPHGO is committed to become a provider of universal
> + computing power, focusing on the development and
> + promotion of computing power products such as AI and
> + RISC-V CPU.
This is not a place for marketing blurbs, please take a look at the
other entries.
Also, this should not be placed at the end of the list, it should be
before ARCH_SUNXI.
Thanks,
Conor.
> +
> endmenu # "SoC selection"
> --
> 2.25.1
>
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