[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7f743fba-6cba-cce0-d499-0a9d95e3b026@collabora.com>
Date: Fri, 15 Sep 2023 10:55:50 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Lee Jones <lee@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: Zhiyong Tao <zhiyong.tao@...iatek.com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 02/11] mfd: mt6358: Add registers for MT6366 specific
regulators
Il 22/08/23 10:45, Chen-Yu Tsai ha scritto:
> The MT6366 PMIC, compared to the MT6358, does away with the VCAM*
> regulators. Two regulators VM18 and VMDDR reuse their register space.
> There's also a VSRAM type regulator VSRAM_CORE thats' split between
> the VCAM* register space and other parts.
>
> Add register address macros for these MT6366 specific regulators.
>
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
For ease of applying to MFD, I think it's ok to have the header changes split
from the actual user; so:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cheers!
> ---
> include/linux/mfd/mt6358/registers.h | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/include/linux/mfd/mt6358/registers.h b/include/linux/mfd/mt6358/registers.h
> index 5ea2590be710..d83e87298ac4 100644
> --- a/include/linux/mfd/mt6358/registers.h
> +++ b/include/linux/mfd/mt6358/registers.h
> @@ -294,4 +294,21 @@
> #define MT6358_AUD_TOP_INT_CON0 0x2228
> #define MT6358_AUD_TOP_INT_STATUS0 0x2234
>
> +/*
> + * MT6366 has no VCAM*, but has other regulators in its place. The names
> + * keep the MT6358 prefix for ease of use in the regulator driver.
> + */
> +#define MT6358_LDO_VSRAM_CON5 0x1bf8
> +#define MT6358_LDO_VM18_CON0 MT6358_LDO_VCAMA1_CON0
> +#define MT6358_LDO_VM18_CON1 MT6358_LDO_VCAMA1_CON1
> +#define MT6358_LDO_VM18_CON2 MT6358_LDO_VCAMA1_CON2
> +#define MT6358_LDO_VMDDR_CON0 MT6358_LDO_VCAMA2_CON0
> +#define MT6358_LDO_VMDDR_CON1 MT6358_LDO_VCAMA2_CON1
> +#define MT6358_LDO_VMDDR_CON2 MT6358_LDO_VCAMA2_CON2
> +#define MT6358_LDO_VSRAM_CORE_CON0 MT6358_LDO_VCAMD_CON0
> +#define MT6358_LDO_VSRAM_CORE_DBG0 0x1cb6
> +#define MT6358_LDO_VSRAM_CORE_DBG1 0x1cb8
> +#define MT6358_VM18_ANA_CON0 MT6358_VCAMA1_ANA_CON0
> +#define MT6358_VMDDR_ANA_CON0 MT6358_VCAMD_ANA_CON0
> +
> #endif /* __MFD_MT6358_REGISTERS_H__ */
Powered by blists - more mailing lists